Clock Regions-Block Scope:
+--------------------------------------------------------------------------+
| (X0,Y*): (Xmin,Xmax,Ymin,Ymax) | (X1,Y*): (Xmin,Xmax,Ymin,Ymax)
+--------------------------------------------------------------------------+
| (X0,Y2): (0,39,60,89) | (X1,Y2): (40,75,60,89)
| (X0,Y1): (0,39,30,59) | (X1,Y1): (40,75,30,59)
| (X0,Y0): (0,39,0,29) | (X1,Y0): (40,75,0,29)
+--------------------------------------------------------------------------+
Clock Regions-Clock Primitives:
+--------------------------------------------------------------------------------------------------------------------------------------+
| Clock Region Name | CLK PAD | PLL PAD | RCKB | IOCKGATE | IOCKDIV | CLMA | CLMS | DRM | APM
+--------------------------------------------------------------------------------------------------------------------------------------+
| (X0,Y0) | 4 | 6 | 4 | 2 | 2 | 520 | 180 | 12 | 0
| (X0,Y1) | 4 | 6 | 4 | 2 | 2 | 610 | 210 | 12 | 0
| (X0,Y2) | 4 | 6 | 4 | 2 | 2 | 524 | 180 | 6 | 0
| (X1,Y0) | 4 | 6 | 4 | 2 | 2 | 450 | 150 | 6 | 10
| (X1,Y1) | 4 | 6 | 4 | 2 | 2 | 540 | 180 | 6 | 10
| (X1,Y2) | 4 | 6 | 4 | 2 | 2 | 630 | 210 | 6 | 10
+--------------------------------------------------------------------------------------------------------------------------------------+
Global Clock Buffer Constraint Details:
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source Name | Source Pin | Source-Buffer Net | Buffer Input Pin | Buffer Name | Buffer Output Pin | Buffer-Load Net | Clock Region Of Buffer Site | Buffer Site | IO Load Clock Region | Non-IO Load Clock Region | Clock Loads | Non-Clock Loads
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| u_ad_wave_rec/u_pll/u_pll_e1/goppll | CLKOUT0 | nt_ad_clk | CLK | clkbufg_6/gopclkbufg | CLKOUT | ntclkbufg_3 | --- | --- | --- | --- | 195 | 0
| sys_clk_ibuf/opit_1 | INCK | _N0 | CLK | clkbufg_4/gopclkbufg | CLKOUT | ntclkbufg_1 | --- | --- | --- | --- | 8 | 0
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain | TCK_USER | u_CORES/drck_o | CLK | clkbufg_5/gopclkbufg | CLKOUT | ntclkbufg_2 | --- | --- | --- | --- | 117 | 0
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain | CAPDR | u_CORES/capt_o | CLK | clkbufg_3/gopclkbufg | CLKOUT | ntclkbufg_0 | --- | --- | --- | --- | 11 | 0
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Global Clock Source Constraint Details:
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source Name | Source Pin | Source-Load Net | Clock Region Of Source Site | Source Site | Clock Buffer Loads | Non-Clock Buffer Loads
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| u_ad_wave_rec/u_pll/u_pll_e1/goppll | CLKOUT0 | nt_ad_clk | (X0,Y2) | PLL_82_319 | 1 | 1
| sys_clk_ibuf/opit_1 | INCK | _N0 | (X0,Y2) | IOL_7_298 | 1 | 0
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain | TCK_USER | u_CORES/drck_o | (X0,Y2) | SCANCHAIN_48_328 | 1 | 0
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain | CAPDR | u_CORES/capt_o | (X0,Y2) | SCANCHAIN_48_328 | 1 | 0
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Device Cell Placement Summary for Global Clock Buffer:
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source Name | Source Pin | Source-Buffer Net | Buffer Input Pin | Buffer Name | Buffer Output Pin | Buffer-Load Net | Buffer Site | IO Load Clock Region | Non-IO Load Clock Region | Clock Loads | Non-Clock Loads
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain | CAPDR | u_CORES/capt_o | CLK | clkbufg_3/gopclkbufg | CLKOUT | ntclkbufg_0 | USCM_74_107 | --- | (32,34,52,53) | 11 | 0
| sys_clk_ibuf/opit_1 | INCK | _N0 | CLK | clkbufg_4/gopclkbufg | CLKOUT | ntclkbufg_1 | USCM_74_105 | --- | (60,66,48,49) | 8 | 0
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain | TCK_USER | u_CORES/drck_o | CLK | clkbufg_5/gopclkbufg | CLKOUT | nt