联想Y470图纸电路图板号LA-6881P

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联想Y470图纸电路图,注意:此机有N卡和A卡两个版本,这个主板的板号是LA-6881P,N卡的机
Voltage Rails SIGNAL STAE p_$1# Lp_s3# sLP_s4# sLP ss#+VALw+v +vs Clock Power Plane escription FuLI ON HIGH IGh HIGH HIGH SI(Power On Suspend) HIGH HTGH BATT+ Battery power supply(12.6v) AC or battery power rail for power circuit. 33【 uspend to RAM LOW HIGHHIGH OFF CPU CORE FF OFF s4 (Suspend to Disk) 工OR LOW OFF OFF +VGA CORE ltage for GPU +0.675vs power rall for DDR3L term inator ON OFF。FF S5S。 tt OFF丿 LOW LOW +1.05v power rail for CPU +1.05VSDGPU +1.05VsDG PU switched power rail for GPU Board iD/SKU ID Table for ad channel +1. 5VSDGPU 1.5VSDGPU power rail for GPU Ra 100K+/-18 +1.5v power rail for CPU Rb VAD BID min VAD BID typ VAD BD max EC AD +3valw always on power rail 0x00-0x0B B+ to +3VLP power rall for suspend power 12K+/-1号 0.354V 0.360V +3vaLW to +3vs power rail ONOFFOFF 15K+/-1号 0. 423V 0.430V 0.438v 0x1D-0x26 +vs to +3vsDGPU power rail for GPU 12345678911 20K+/-1号 541V 0.550V 0.559v 0x27-0X30 +5VALW +5vALWP to +5VALW power rail 7K 0.691 0.702V 0.713V 0x31-0x3B s powcr rail 33R+/-18 0.80 .819V 0x3c-0x46 +RTCVCC RTcp。we ON ONON 43K+/-1号 0.978V 0.992V 1.006V 0x47-0x54 56K+/-1号 169V 185v 200v 0X55-0x64 75K+/-1号 .398V 1.414V 1.430V 0y65-0x76 100K+/-1号 634V 1.650V 667v 0x77-0x87 0 130K+/-1号 849V 1.865V 1.g81V 0x88-0x95 160K+ 2.015V 2.031V 2.046V 0x97-0xA3 0xA4-0xAD Note: ON* means that this power plane is on only with ac power available, otherwise it is OFF 13 240K十/-1 2.316V 2.329V 2.343V OxAE-OxB7 14 2.395V 2.408V 2.421v oxB8-Oxco EC SM Bus address 270K+/-1豸 EC SM Bus2 address 330K+/-1号 2.521V 2.533V 2.544V OxC1-0xc9 Device 430K+/-1旨 2.667V 2.677V Address 0001011 17 560K+/-1号 2.791V 2.g00V 2.B08V ORD4-OxDC VGA Internal Thermal Senser 0100 00Dx 18 750K+/-182.905V 2.912V 2.919V OxDD-0xE6 3.000V 3.300V 0xE7-OxFF PCH SM Bus address Device Address BOARD ID Table BTO Option Table 10100000 10100010 Byo工tem om struc七ue B。 ard ID PCB ReVi。n Unp CONNG USB Port Table 3 External USB 2.0 Port USB Por七 1234 Ec9012 0.3 UMA Component UMAO@ 1.0 GPU VGA@ 0 USB Port(Left 3.0) USB Port(Right 2.0) EDPpanel EDEe eDpt。LvDs LVDSG USB Port(Right 2.0) Finger Printer EMC Component EMcE EHCI1 EMC Reserve XEMC Touch Screen DGPU IDEN VGMe, SGra USB/12C Bridge VGM-82 0M: SGT-84 OM WLAN GC62.0 Webcam non Gc 6 NGC USB 3.0 VRAM SO1ee七i。n USB Port(Left 3.0) 76e Digital MIC Mice/2Dmic@ UsB/工2cBRI TPBRI a Touch screen Security Classification Compal Secret Data Compal Electronics, Inc Issued Date Notes List s AY RF LED FY OR DISCI OSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT DF COMPAl Fl ECTRONICS ZSWAF M/B LA-B702 TX HRX PFG RCOMI Note: Trace width=12 mils Spacing=15mils GTX HRX N DMI RXP DMI CTX PRX N3 DMI CTX PRX N5 A17 DM TXN 5 DMI TXP Design gulde shot 样8C <14> FDI CSYNC 14 PEG RXP FEG TXN 7 PEG_ TX_GRX_N7 0.22U_0402_10VEK VGM@ 2 1 C45 PEG_I TX_C_GRX_N EEFEE RNbD2cc[:8上SRXN 1 PEG HTX_ GRX P7 0. 22U_0402_10VEK VGM@ 2 1 C49 PEG HTX_ GRX Security classificatio Campal Secret Data Deciphered Date PROCESSOR(/7 DML,FDDIPEG HIS SHEET OF ENGIN oF CoMPAL ELECTRONICE INC. AND CONTAINS GONFIDI MAY RF ! ISED RY DR D n To ANY THIRE PARTY WITHOIIT PRIOR WRITTFN ZSWAW MB LA-B702 E COMPAI FI ECTRONICS Place near SoDiMm side <11,12> 014.D5(C Change to Fop rer LEWAN ESD DDR3 COM PENSATION SIGNALS Gwal rPGA Ens ECI/THERM Note Trace width=4 mils Spacing= 18mil MICC Trace width=12 15 mil, Spcing=20 mils n4 5, n Change to prr Zo=50 ohm ax trace length= 500 mils 3924>H32H#> H FROCHOT# H PROCHOT# R PU/PD for JTAG signals <19> H THRMTRIP RVTRIP 上滥 T10 XDP DBRES=T* R11 2 1K0402% 4> H PM SYNc d >cPU= LTPST#匚 105Vs BPM N 01U04021eV7K-N H4R5% Near hIp 上 L- HASWEL2t9 +VGGIO OIT 2014.05. [6: ChanGe to HoP For LEWAN ES 110Kc4025% SSC CLOCK TERMINATION, IF NOT USED, stuff R26 R27 SM DRAMPWROK with dDR Power Gating Topology <14>HML卜 AM HWRGL[ ampal Secret Data Compal Electronics, Inc sued Date SHEET OF ENGINEERING DRAWING IS THE INS ONFIDEN PROCESSOR(2/7)PM,XDP,CLK MAY BE USED BY OR DISCI CSED TO ANY THIRD PARTY NIHOUT PR OR WRITTEN CONSENT OF COMPAL FL ECTRCNICS INC ZSWAW MR LA-B702 TweEd 2C14 A_D.6 删器 ISVL OL M CLK DDRE·而 DOR 3 D/0.63] M CLK DOR神)<11 K三0DMMA DDR卉1 11≥ SA C< N 二目 2 PENPENPE 今 DDR CKE1。MMA“11 12> RA吕 AC8 sA5MDR。sDMA B8688 DDR CSO DDR B D14 AN1 SB_D →M7 DDR BS R3 M ODT N瞬 S DDR A BS2 411 昌A55 DDR B DZ4 AN4 SB- DQ 23 A RAS# A CASH R 11 D R6 DDR B RAS# 12 ≈3 R F2 AD6 DDR A MA8 DDRB匚3 尺L HE MA HAAE DDR E MA5 OF SB DDR A DaS圳Q刀 SB CO3 2 SA DOS N E s DQ 52 SB DOS N DDR A DQs[o71<1 SA DO 5S RB50张 REF CA R. SE-LUS F3HAS DDR E DCS DIMMA R 日Rver DR B D63 F SR Do g 是[ Security Classification ampal Secret Data sued Date SHEET OF ENGINEERING DRAWING IS THE INS CONFIDEN PROCESSOR(/7)DDRIII MAY BE USED BY OR DISCI CSED TO ANY THIRD PARTY NIHOUT PR OR WRITTEN CONSENT OF COMPAL FL ECTRCNICS INC A=B702 TweEd 2C14 COMPENSATION PU FOR eDP UT ote Trace width=20 mils spacing=25mil Max length=100 mils 卜 aswel币 GA ECS JCPU1H 化_0402167K HDMI D2 DDIB TXBN EDP AUXN EDP AUXP HDMI U30 EDP HDMI x日C HDMI DO 目 EDP DISP UT HDMI CI K B XB DP TxN O 么 CCI OJT CONN@ HPD INVERSION FOR EDP 3031> FDP HPD匚 HPD is a active high signal from device The hpd processor input is a low voltage active signal Security Classification ampal Secret Data Compal Electronics, Inc sued Date SHEET OF ENGINEERING DRAWING IS THE PROCESSOR(4/7),XDP,CLK MAY BE USED BY OR DISCI CSED TO ANY THIRD PARTY NIHOUT PR OR WRITTEN CONSENT OF COMPAL FL ECTRCNICS INC A=B702 TweEd 2C14 CEG Straps for Process peG Static Lane ReversaL CFG2 is for the 1e 1: Normal Operation: -ane defini-icn matches pin map definition 8 RS/_TP CFG Embedded Display Port Presence strap +CPU COREO 1: Disabled: No Physical isplay port 0 CES aL Laul.ed Lo Elh edded Displdy PorL R309 *0:Erdb1∈d;Ar!exLe141D⊥sp- dy PorL device主 connected to the Embedded Display Port 8+Az:8 UFG 15 PCIE Port Bifurcation straps FG[G: 51 10: x8, x8-Device 1 furction 1 enabled; fuaction 2 DC:8,x4,x4 ice1± unctions1and2enab⊥ed (Detau--) PEG Train -mmediately folloW-n XxRESETB Security Classification ampal Secret Data Compal Electronics, Inc sued Date m0141226 PROCESSOR(5/7)RSVD, CFG MAY BE USED BY OR DISCI CSED TO ANY THIRD PARTY NIHOUT PR OR WRITTEN CONSENT OF COMPAL FL ECTRCNICS INC A=B702 TweEd 2C14 +1.35V CPU VDDQ Source AA3C 5y CPU VDDQ MAX 2.1 A VCC SENSE +CPU CORE 43X118m - <151 lace the up resistar close to cpu P OUT VDDQ DECOUPLING H CPU SVID__RTf 22u·11 VR SVID AIRT# AM28d vIDALERT Place to BOT CPU socket cavity Place to TOP CPU socket cavity PWH DEbUG 菌9喜 一要8 10K0402 g +VCCIO CUI AT2√s5 GFU COR三 Place to TOP CPU socket cavity Place to BOT CPU socket cavity sF000006s00 330U2.5VH4.2 mohm OSCoN Compal Secret Data IssuedDate Deciphered Date 而具出以是数以出5甲 ASV M/R Le4B7D2 THF PROPRIFTARY PROPFRTY OF COMPA FIFCTRONICS IN AND CONTAINS COAFIDFN PROCESSOR(/7)PWR EMEED EX CE DIAS AED TOAR uesday. May 27, 2014 cheet 9 well rECA EDS VSS esss VSs F14 图s 519 妇温 EL HASWELL HASWE 6 OF 9 Security Classification ampal Secret Data Compal Electronics, Inc sued Date SHEET OF ENGINEERING DRAWING IS THE PROCESSOR(7/7) VSS MAY BE USED BY OR DISCI CSED TO ANY THIRD PARTY NIHOUT PR OR WRITTEN CONSENT OF COMPAL FL ECTRCNICS INC A=B702 TweEd 2C14

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试读 56P 联想Y470图纸电路图板号LA-6881P
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tylgzhy 和我的不太一样
2019-08-01
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864082942 这是6881p?
2019-07-18
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lvxingzhe0902 电脑修好了,一个小电容坏了。
2019-07-03
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