bq24735.pdf

bq24735

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ZHCS444A –SEPTEMBER 2011–REVISED JANUARY 2013

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= 1.984A, I

= 2.54A, V

= 12.592V, 65W adapter and 3S2P battery pack

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(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as

(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC standard

(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

(5) The junction-to-top characterization parameter, ψ

(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a clod plate test on the exposed (power) pad. No specific

over operating free-air temperature range (unless otherwise noted)

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

(2) All voltages are with respect to GND if not specified. Currents are positive into, negative out of the specified terminal. Consult Packaging

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