AM335x 的SysBoot 配置表，Boot[15--0]

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Functional Description

Table 26-7. SYSBOOT Configuration Pins[4]

SYSBOOT[15:14 SYSBOOT[13:12 SYSBOOT[11:10 SYSBOOT[9] SYSBOOT[8] SYSBOOT[7:6] SYSBOOT[5] SYSBOOT[4:0] Boot Sequence

] ] ]

For all boot For all boot For XIP boot: For EMAC For all boot

For XIP boot: For NAND and

modes: Crystal modes: Set to Bus width boot: PHY modes:

NANDI2C

Muxed or non-

enabled/disable

For Fast

must be 00b

d on

External Boot:

XDMA_EVENT

must be 0b

_INTR0

CONTROL_ CONTROL_ CONTROL_ CONTROL_ CONTROL_ CONTROL_ CONTROL_ CONTROL_

STATUS[23:22] STATUS[21:20] STATUS[19:18] STATUS[17] STATUS[16] STATUS[7:6] STATUS[5] STATUS[4:0]

disabled

01b = 24MHz 00b = non-muxed 1 = 16-bit

reserved) (MUX2)[2

device device 1 = CLKOUT1

10b = 25MHz

enabled

10b = muxed

11b = 26MHz

device

reserved)

1 = ECC 1 = CLKOUT1

10b = 25MHz

handled by enabled

11b = 26MHz

NAND

00b Don't care for Don't care for 00011b UART0 SPI0 XIP MMC0

00b = 19.2MHz For XIP boot: 0 = 8-bit device 0 = CLKOUT1

(all other values ROM code ROM code (MUX2)[2

disabled

11b = 26MHz

device

x1b = reserved

00b Don't care for 00100b UART0 XIP w/ MMC0 NAND

00b = 19.2MHz For XIP boot: 0 = ECC done 0 = 8-bit device 0 = CLKOUT1

(all other values ROM code WAIT[1]

by ROM disabled

01b = 24MHz 00b = non-muxed 1 = 16-bit

reserved) (MUX1)

device 1 = ECC device 1 = CLKOUT1

x1b = reserved

For NAND boot:

must be 00b

SPRUH73L–October 2011–Revised February 2015 Initialization

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