凌通无线充电方案电源芯片GPMD2130A规格书

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凌通无线充电方案电源芯片GPMD2130A规格书。 FAE:135 9015 2895
Preliminary Generalplus GPMD2130A Synchronous MosFET Drivers 1 GENERAL DESCRIPTION 3. FEATURES The gPmd21 30A is designed to drive dual N-channel MOSFETs e Drives Dual n-Channel MoSFE Ts with 20ns Dead Time with adaptive dead-time control. The device integrated bootstrap Built-in bootstrapping switch forward P-CH MOSFET. It's not necessary to use external Built-in Tri-State PWM Input Function for Power Stage Schottky barrier diode(sBD) to save cost Shutdown The GPMD2130A has a built-in tri-state PWM input function Power-On-Reset Monitoring on VCC Pin which can support a number of PWM controllers. When the Enable/Shutdown Control Function PWM input signal stays within tri-state shutdown window for the Over-Temperature Protection with Hysteresis 160ns (typ )shutdown hold-off time, the tri-state function shuts SOP-8Package off the drivers. The device is also equipped with Power-On-Reset Lead Free and green Devices Available(RoHS Compliant) (POR), enable control, thermal warning and thermal shutdown functions into a single package. The POR circuit with hysteresis monitors VCC supply voltage to start up/shut down the Ic at 4. APPLICATIONS power-on/off. This thermal warning feature is the indication of the high temperature status. The thermal shutdown function shuts Graphics Cards down the drivers when the junction temperature rises beyond ● Severs 160C and will automatically turns on the drivers when the e Portable/Notebook Regulators temperature drops by 20C. The GPMD2 130A is enabled by other power system. Pulling and holding the en pin below 0. 8v shuts off the drivers 2. SIMPLIFIED APPLICATION CIRCUIT GPMD2130A UG PWM CCNTR。LER o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2 Preliminary Generalplus GPMD2130A 5, BLOCK DIAGRAM UG Shutdown PHASE GND o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2 Preliminary Generalplus GPMD2130A 6. PIN DESCRIPTIONS Pin Function No Name Junction point of the high-side MOSFET source, output filter inductor and the low-side MoSFET drain. Connect this pin to the source of the high-side MOSFET. This pin is used as sink for UG driver. This pin is also monitored PHasE by the adaptive shoot-through protection circuitry to determine when the high-side MoSFET has turned off. An Schottky diode between this pin and the ground is recommended to reduce negative transient voltage that is common in a power supply system 2ug output of the high-side MosFet driver. Connect this pin to gate of the high-side mosfet. Output of the low-side MOSFET Driver. Connect this pin to gate of the low-side MOSFET. This pin is monitored LG by the adaptive shaot-through protection circuitry to determine when the low-side MoSFEt has turned off. 4 GNo Power ground for the low-side gate drivers. Connect this pin to the source of low-side MOSFET. This pin is used as sink for LG drivers. All voltage levels are measured with respect to this pin Tie this pin to the ground island/plane through the lowest impedance connection available Enable pin of the MOSFET drivers. Applying and holding the voltage on this pin above the enable voltage threshold enables the drivers. When leave this pin open, an internal pull-low current(1.5HA typical)pulls the EN EN voltage and shuts down the drivers. The pin is pulled low when the junction temperature rises beyond thermal shutdown level PWM PWM drive logic input Supply voltage input pin for control circuitry. Connect +5V from the vcc pin to the AGNd pin Decoupling at VCC least 1uF of a mlcc capacitor from the vcc pin to the agNd pin 8 Supply input for the UG gate driver and an internal level-shift circuit. Connect to an external capacitor to create BOOT a boosted voltage suitable to drive a logic-level N-channel MOSFET 6.1. Pin Configuration GPMD2130A PHASE1[○ 8 BOOT UG2口 口7VCC LG 3 口6PWM GND4口 囗5EN SOP-8 〔 Top v o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2 Preliminary Generalplus GPMD2130A 7. FUNCTION DESCRIPTIONS VCC Power-On-Reset(POR) Thermal shutdown a Power-On-Reset(POR) function is designed to prevent a thermal shutdown circuit limits the junction temperature of incorrect logic controls when the vcc voltage is low. The POR GPMD2130A. When the junction temperature exceeds +160C function continually monitors the bias supply voltage on the vcc a thermal sensor turns off the drivers, allowing the device to cool pin if at least one of the enable pins is set high. When the Vcc down. When the devices junction temperature cools by 20"C supply voltage exceeds the rising POR threshold, the PoR the internal thermal sense circuit will enable the drivers. For enables the device. The POR circuit has a hysteresis and a normal operation, the device power dissipation should be de-glitch feature so that it will typically ignore undershoot externally limited so that junction temperatures will not exceed transients on the vcc pin +125C Enable Control Pulling the vEn above 2v will enable the driver output, and pulling VEN below 0. 8V will disable the driver output. When leave this pin open, an internal pull-low current (1.5uA typical) pulls the EN voltage and shuts down the drivers. If enable function is not used, connect en to VIN for normal operation o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2 Preliminary Generalplus GPMD2130A 8. ABSOLUTE MAXIMUM RATINGS(Note 1) Symbol Parametel vcC to aGNd Voltage -0.3~7 DRV to PGnd voltage -0.3~7 BooT to PHASE Voltage 0.3~7 V√vv V BOOI BOoT to AGND Voltage 0.3-35 PHASE to AGND Voltage VPHASE >20ns Pulse Width -0.3~28 20ns Pulse wiath 5~35 UG to PHASE Voltage >20ns Pulse Wiath 0.3~ BOot+0.3 <20ns Pulse width 5-VBO0T+0.3 LG to PGNd Voltage >20ns Pulse width 0.3~Vc+0.3 <20ns Pulse width 5~Vcc+03 PGND to AGND Voltage -0.3~+0.3 VEN, VPWM EN, PWM, THWN, LSDBL to AGND Voltage 03~Vcc+0.3 V THWN, VLSDB Junction Temperature 150 Ts Storage Temperat 65~150 Maximum Lead Soldering Temperature(10 seconds 260 Note 1: Stresses beyond those listed under absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability 9. THERMAL CHARACTERISTICS Symbol Parameter Typical value Unit Junction-to-Ambient Resistance in free air (Noto 2) e 110 SOP-8 Note 2 OJA is measured with the component mounted on a high effective thermal conductivity test board in free air 10. RECOMMENDED OPERATION CONDITIONS (Note 3) symbol Parameter Range Unit Voc VDRy VCC, DRV to AGND Voltage 4.05.5 gIc High Inpu 2~5.5 ENL EN Logic Low Input Voltage 0~0.8 40~125 Note 3: Refer to the typical application circuit o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2 Preliminary Generalplus GPMD2130A 1. ELECTRICAL CHARACTERISTICS Unless otherwise specified, these specifications apply over VCC=VDRV=vB00T=5V, vEN=5V, and TA=-40 to 85 OC. Typical values are at TA=250C GPMD2130A symbol arameter Test Conditions Unit Min Ty M SUPPLY CURRENT VCC Supply Current LSDBL pin fl 0.46 IvCc Shutdown Current VEN-OV, L LSDBL pin floati 0.2 mA POWER-ON-RESET(POR) VCC Rising POR Threshold 353739V VCC POR Hysteresis 0.2 PWM INPUT PIN PW/M H PWM Rising Threshold 3.8 VPwNL PWM Falling Threshold 0.9 Tri-State Shutdown Window 1.6 2.9 Shutdown Hold-Off Time (Note 4) ns PWM Input Resistance ApWM=1V EN INPUT PIN VENH EN Input Logic High VENL EN Input Logic Low 8 EN Input Current 1.5 LSDBL INPUT PIN VlH Low-Side Activation Threshold Low-Side Disable Threshold LSDBL Input Current -15A BOOTSTRAP SWITCH 0.5 0. Reverse Leakage VBOOLGND=30V, VEHASE=25V, VDHv=5V 05 A GATE DRIVER UG Pull-Up Resistance 1.7 2.5 UG Sink Resistance 2.5 LG Pull-Up Resistance 2 3 LG Sink Resistance 0.6 IG to LG Dead Tim LG to UG Dead Time (Note 4 UG Rising Time 0 UG Falling Time LG Rising fime (Note 4 20 LG Falling Time (Note 4) PROTECTION S lown em ture 160 Thermal Shutdown Hysteresis (Note 4) 20 Note4: Not tested in production o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2 Preliminary Generalplus GPMD2130A 12. TYPICAL APPLICATION CIRCUIT 12.1. 19V Half Bridge Test circuit R OR C BOOT CIN1 22uF GPMD2130A UG SN314/5/6 1uF 02 PWM BACK <Optional 10kQ2 SM3145/6 Optional GND ISOLATION FEEDBACK o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2 Preliminary Generalplus GPMD2130A 12.2. 5V Full Bridge Test Circuit R O 0s2 +5V 0.1uF GPMD2130A UG A5M376工1 UG 02 PWM QQ BACK PHASE 三N R <Optional 10k2 LG :M31456 Optional GND ISOLATION AND FEEDBACK 5y Cy R 1uF BOOT BOOT 10LUF GPMD2130A UG SM314561 RU PWM PHASE Rs M3314/56 R GND o Generalplus Technology Inc June15,2017 Proprietary confidentia Preliminary Version: 0.2

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