远程 USB 光纤传输系统的研究与设计
摘 要
通用串行总线（USB）是一种新兴的计算机外围通信接口标准，随
着计算机技术和数字技术的迅猛发展，以及 USB 2.0、USB OTG 的推出，
USB 技术的应用日益广泛。USB 具有灵活、方便、应用范围广、通信稳
定、成本低廉等优点，已成为当前计算机必备的接口。但是其单段电缆
几米、多级串联几十米的传输距离，始终是限制其应用范围进一步拓展
的巨大障碍。因此，远程 USB 传输系统的开发具有重要意义。
本文提出了一种利用光纤实现 USB 信号远距离透明传输的方案。它
支持 USB 全速传输，在本地的主机一侧和远端的设备一侧分别添加一个
光收发端机，中间通过一对单模光纤进行连接。本文对系统的硬件电路
和 FPGA 内核编程作了详细介绍，给出了各部分的电路原理图、Verilog
核心代码和调试结果，对系统调试和运行中出现的问题进行了分析，给
出了解决问题和排除故障的方案。文末还对高速远程 USB 传输系统的设
计提出了建议，并提出了后续工作的目标。
关键词：通用串行总线（USB），光纤传输，远程传输，现场可编程门阵
列（FPGA），Verilog 硬件描述语言（Verilog HDL），光收发端机
图片目录
图 1 USB 总线拓扑 ········································································································· 5
图2 USB电缆················································································································· 5
图 3 典型的高速/全速 USB 电缆结构··········································································· 6
图 4 插锁型连接器协议 ································································································· 7
图 5 低速设备的电缆和电阻连接 ················································································· 8
图 6 全速和高速设备的电缆和电阻连接 ····································································· 8
图 7 NRZI 数据编码 ····································································································· 10
图 8 USB 分层体系结构 ······························································································· 13
图 9 USB 包的结构 ······································································································· 14
图 10 SYNC 字段的结构 ································································································ 15
图 11 PID 字段的格式···································································································· 15
图 12 令牌包的结构 ······································································································· 18
图 13 SOF 包实例 ··········································································································· 19
图 14 SETUP 包实例······································································································· 19
图 15 IN 包实例 ·············································································································· 20
图 16 OUT 包实例··········································································································· 20
图 17 DATA 包的结构···································································································· 21
图 18 DATA0、DATA1 包实例······················································································ 22
图 19 握手包的结构 ······································································································· 22
图 20 ACK 包实例 ·········································································································· 22
图 21 NAK 包实例 ·········································································································· 23
图 22 STALL 包实例······································································································· 23
图 23 远程 USB 光纤传输系统总体结构 ······································································ 28
图 24 光收发端机的结构 ······························································································· 29
图 25 MAX3453E 功能框图 ··························································································· 31
图 26 MAX3453E 周边电路 ··························································································· 33
图 27 MAX3453E 周边电路设计原理图 ······································································· 33
图 28 PT7311-21-1 外观实图及引脚示意图 ······························································· 34
图 29 PT7311-21-1 驱动电路 ······················································································· 35
图 30 PT7311-21-1 驱动电路设计原理图 ··································································· 35
图 31 串行配置器件周边电路 ······················································································· 38
图 32 供电电路设计原理图 ··························································································· 38
图 33 顶层 PCB 视图 ······································································································ 39
图 34 系统外观实图 ······································································································· 40
图 35 光端机对不同包的处理 ······················································································· 42
图 36 SETUP 进程数据流图··························································································· 43
图 37 IN 进程数据流图 ·································································································· 44
图 38 OUT 进程数据流图······························································································· 45
图 39 FPGA 内核结构框图 ···························································································· 46
图 40 系统运行波形图（1） ························································································· 54
图 41 系统运行波形图（2） ························································································· 55
图 42 系统运行波形图（3） ························································································· 55
Fig. 1 USB Bus Topology....................................................................................................5
Fig. 2 USB Cable.................................................................................................................5
Fig. 3 Typical High-/full-speed Cable Construction ...........................................................6
Fig. 4 Keyed Connector Protocol.........................................................................................7
Fig. 5 Low-speed Device Cable and Resistor Connections .................................................8
Fig. 6 High-/full-speed Device Cable and Resistor Connections ........................................8
Fig. 7 NRZI Data Encoding...............................................................................................10
Fig. 8 USB Implementation Areas and Host/Device Detailed View..................................13
Fig. 9 USB Packet Structure..............................................................................................14
Fig. 10 SYNC Pattern..........................................................................................................15
Fig. 11 PID Format..............................................................................................................15
Fig. 12 Token Format ..........................................................................................................18
Fig. 13 SOF Patterns ...........................................................................................................19
Fig. 14 Setup Token Pattern................................................................................................19
Fig. 15 In Token Pattern .....................................................................................................20
Fig. 16 Out Token Pattern...................................................................................................20
Fig. 17 Data Packet Format.................................................................................................21
Fig. 18 A Sample with Data0 and Data1 Packets................................................................22
Fig. 19 Handshake Packet Format ......................................................................................22
Fig. 20 ACK Handshake Pattern.........................................................................................22
Fig. 21 NAK Handshake Pattern.........................................................................................23
Fig. 22 STALL Handshake Pattern .....................................................................................23
Fig. 23 System Structural Overview ....................................................................................28
Fig. 24 Functional Diagram of the Optical Transceiver ......................................................29
Fig. 25 Functional Diagram of MAX3453E ........................................................................31
Fig. 26 Typical Operating Circuits for MAX3453E ............................................................33
Fig. 27 Circuit Scheme for MAX3453E ..............................................................................33
Fig. 28 Form and Pins of PT7311-21-1.............................................................................34
Fig. 29 Typical Operating Circuits for PT7311-21-1 ........................................................35
Fig. 30 Circuit Scheme for PT7311-21-1 ..........................................................................35
Fig. 31 Operating Circuits for Serial Configuration Device.................................................38
Fig. 32 Circuit Scheme for Power Supply Module...............................................................38
Fig. 33 PCB Top-Layer Overview........................................................................................39
Fig. 34 System Operating Overview ....................................................................................40
Fig. 35 Dispositions of Different Types of Packets..............................................................42
Fig. 36 Packet Flow Chart for Setup Procedure ..................................................................43
Fig. 37 Packet Flow Chart for In Procedure ........................................................................44
Fig. 38 Packet Flow Chart for Out Procedure......................................................................45
Fig. 39 FPGA Kernel Block Diagram..................................................................................46
Fig. 40 Waveform Captured During System Running (1) ....................................................54
Fig. 41 Waveform Captured During System Running (2) ....................................................55
Fig. 42 Waveform Captured During System Running (3) ....................................................55
表格目录
表 1 全速数据传输中的总线状态（部分） ··································································· 9
表 2 PID 类型（部分）·································································································· 16
表 3 向 USB 发送数据时的真值表················································································ 32
表 4 从 USB 接收数据时的真值表················································································ 32
