高速光耦数据手册

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高速光耦HCPL-0601,对硬件设计来说,考虑电气隔离的需要,或者通信时,电气隔离
HCPL-26lA/26IN/263A/263N Outline Drawing Pin Location (for reference only) Figure 1.8-Pin Dual In-Line Package Device Outline drawing. Figure 2. Gull wing Surface Mount Option #300 HCPL-061A/061N/068A/068N Outline Drawing Figure 3.8-Pin Small outline Package Device drawing. Solder reflow Temperature Profile (icPL-06XX and Gull Wing Surface Mount Option 300 Parts) Note: Use of nonchlorine activated fluxes is recommended Regulatory Information CSA The HCPL-261A and HCPL-26in Approved under csa component families have been approved by Acceptance Notice #5, File Ca the following organizations 88324 UI VDE Recognized under uL 1577 approved according to VDE Component recognition 0884/06.92.(HCPI261A/261N Program, File E55361 Option 060 only) Insulation and Safety Related specifications 8-Pin dip 300 Mil) So-8 Parameter Symbol value Value Units Conditions Minimum External Air L(101) 7.1 4.9 mm Measured from input terminals to Gap (external output terminals, shortest distance Clearance) through air Minimum external L(102) 7.4 4.8 mm Measured from input terminals to Tracking (External output terminals, shortest distance Creepage) path along body. Minimum internal plastic 0.08 0.08 mm Through insulation distance, conductor Gap (nternal Clearance) to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity Tracking Resistance CTI 200 200 Volts DIN IEC 112/VDE 0303 Part 1 Comparative Tracking ndex Isolation group IIla IIIa Material Group DiN VDE 0110, 1/89, Table 1) Option 300 -surface mount classification is Class a in accordance with CEcc 00802 VDE 0884 Insulation related characteristics (HCPL-261A/26iN Option 060 ONLY Description Symbol CharacteristicUnits Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage 300 rms I-Ⅳ for rated mains voltage 450 V rms I -III Climatic Classification 55/85/21 Pollution Degree (DIN VDE 0110/1.89) 2 Maximum Working Insulation Voltage IORM 630 VI peak Input to Output Test Voltage, Method b Partial Dis mia pR, 100% Production Test with tm=1 sec, TORM 1.875= VE PR 1181 <5DC p Input to Output Test voltage, Method a VIORMX 1.5= VPR, Type and sample test, tm =60 sec PR 945 V peak Partial Discharge <5 pC Highest Allowable Overvoltage (Transient Overvoltage, tini 10 sec) IOTM 6000 y Safety limiting values ( Maximun values allowed in the event of a failure also see Figure 18, Thermal Derating curve. Case Temperature 175 Input Current S INPUT 230 Output Power PS OUTPUT 600 mw Insulation Resistance at T s, V10=500 V R 10 *Refer to the front of the optocoupler section of the current catalog, under Product Safety regulations section (vDE 0884), for a detailed description. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application Absolute Maximum Ratings Parameter SymbolMin.Max.UnitsNote Storage temperature 125 Operating temperature 40 +85 C Average Input Current IF(AVG) 10 Reverse Input voltage V 3 Volts Supply voltage 0.5 7 Volts 2 Enable Input Voltage 0.5 Volts Output Collector Current (Each Channel) 50 Output Power Dissipation(Each Channel) P O 60 mw 3 Output Voltage (each channel) Volts Lead Solder Temperature 260C for 10 S, 1.6 mm Below Seating Plane THrough Hole Parts Only) Solder reflow temperature profile See Package Outline Drawings section (Surface Mount Parts Only) Recommended Operating Conditions Parameter Symbol In Max Units Input voltage, Low Level 3 0.8 Input Current, High Level 3.0 10 mA Power Supply voltage V CC 4.5 5.5 Volts High level enable voltage EH 2.0 Volts Low Level Enable voltage 0 0.8 Volts Fan Out(atRL=1k TTL Loads Output Pull-up resistor R LL 330 Operating Temperature T -40 85 C Electrical specifications Over recommended operating temperature Ta =-40C to+85 C)unless otherwise specified Parameter Symbol Min. Typ. M Max. Units Test conditions Fig. Note High Level Output OH 3.1 100 A VcC =5.5 V, Vo=5.5 V, 18 Current Vp=0.8V,VE=2.0V Low Level output 0.40.6 v VcC=5.5 V, IoL=13 mA 5,84,18 voltage (sinking),IF=3.0 mA, E High Level Supply CCH 7 10 ImA VE=0.5 V*t- s: Vcc =5.5 4 Current 15 Dual Channel IF=0 mA Products Low Level Supply 13mA|V=0.5VV=5.5V Current 12 Dual Channel IF=3.0 mA Products High Level enable 0.6-1.6 mA Vcc=55V,VB=20V Current米 Low Level enable 0.9-1.6mAVc=5.5V,v=0.5V Currentis Input forward 101.31.6 VIF=4mA 64 Temperature Co- VE/ TA 125 mV/CIF=4mA 4 efficient of forward oltage input re BVR 4 Breakdown Voltage Input Capacitance 60 pF f= 1 MHz, VE=0V All typical values at TA=25 C, Vcc =5 V s Single Channel Products only(HCPL-261A/261N/061A/06IN) i Dual Channel Products only(HCPL- 263A/263N/063A/063N) Switching Specifications Over recommended operating temperature (Ta=-40 C to +85 C) unless otherwise specified Parameter SymbolMin.Typ. * Max.Units Test Conditions Fig.Note Input Current Threshold THL 153.0mVvc=55V,v=0.6V7,1018 High to low Io >13 mA(Sinking) Propagation Delay tplh 52100 ns =3.5mA 2/1,9 9,11 Time to High Output 5.0V, 218 Level VE= Open, Propagation delay PHL 53100 n CL =15 pF, 9,11,4,10, Time to low output R=350 1218 Pulse width distortion PWD 45 ns 9,1317,18 Itphl-tplhl Propagation delay skew PSK 60 ns 2411,18 Output Rise Time 42 n 9,14|4,18 Output Fall Time 12 ns 9,144,18 Propagation Delay 19 ns =3.5mA 15. 12 Time of Enable Vc=5.0V, 16 from veh tO VeL VEL =0V, veh =3 V Propagation Delay LELH 30 ns C =15pF, 15 Time of Enable RL=350 16 from vel to Veh "All typical values at TA= 25 C,Vcc =5V Common Mode Transient Immunity Specifications, All values at TA=25 C Parameter Device Symbol Min. Typ. Max. Units Test conditions Fig.Note Output high CPL-261A CMHI15 kV/s Vcm=50v Vcc =5.0V. 174,13, Level Common HCPI-061A R=350 15.18 Mode Transient HCPL-263A IF=OmA Immunity HCPL-063A TA=25 C HCPL-26IN 1 5 kV/S VN= 1000 V VO(iN)=2 V HCPL-O6IN HCPL-268N 1525 kV/s Using HP App204, 13 HCPL-O63N Circuit 15 Output LowHCPL-26IA CM kV/ s VcM=50v Vcc=5.0 v: 174,1 Level Common HCPL-061A R1.=350 15,18 Mode Transient HCPL-263A IF=3.5 mA Immunity HCPL-OO3A VO(MAx)=0. 8V HCPL-26IN kV/ S VoM=1000V TA=25 C HCPL-O6IN HCPL-263N 1525 kV/S Using HP App 204, 14, HCPL-O63N Circuit 15 Package Characteristics All Typicals at TA= 25 C Parameter Sym. Package*Min. Typ. Max. Units Test Conditions Fig.Note Input-Output 2500 V rms rh 50%0 Momentary with t=i min stand voltage OPT0205000 TA=25 C 5,7 Input-Output R I-O l012 VIO =500 Vde 4,8 Resistance Input-Output O 0.6 pF f= 1 MHz, Capacitance TA=25 C Input-Input I-I Dual channel 0.005 A RH 45% 19 Insulation t=5 Leakage Current V1r=500V Resistance Dual Channel 10 19 (Input-Input) apacitance CI Dual 8-pin DIP 0.03 pF f= 1 MHz (nput-Input Dual so-8 0.25 : Ratings apply to all devices except otherwise noted in the Package column The input-Output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable) your equipment level safety specification or HP Application Note 1074 entitled"Optocoupler Input-Output Endurance voltage fFor 8-pin Dip package devices(HCPL-261A/261N/263A/263N)only Notes: I. Peaking circuits may be used which 8. Measured between the LEd anode and 14. Common mode transient immunity in produce transient input currents up cathode shorted together and pins 5 a Logic Low level is the maximum to 30 mA, 50 ns maximum pulse through 8 she orLd tolerable dvcNdt of the common does, provided the average current 9. The tplh propagation delay is mode pulse, VCM: to assure that the measured from the 1.75 ma point on output will remain in a Logic low 2. 1 minute maximum the falling edge of the input pulse to state(i.e, V0 <0.8 V 3. Derate linearly above 80 C free-air the 1.5 v point on the rising edge of 15. For sinusoidal voltages tempcrature at a ratc of 2.7 mw/ C the output pulse ( for the soic-8 package 10. The tphl propagation delay is 16. Bypassing of the power supply line is 4. Each channel measured from the 1.75 ma point on required with a oI f ceramic disc 5. Device considered a two-terminal the rising edge of the input pulse to capacitor adjacent to each optocoup device: Pins 1, 2, 3, and 4 shorted the 1.5 v point on the falling edge of ler as shown in Figure 19 Total lead together and Pins 5, 6, 7, and 8 the output pulse length between both ends of the shorted together. 11. Propagation delay skew (psw) is capacitor and the isolator pins should 6. In accordance with ul1577, each equal to the worst case difference in not exceed 10 mm optocoupler is proof tested by tplh and/or tphi that will be seen 17. Pulse width Distortion(TWD)is applying an insulation test voltage between any two units under the defined as the difference between 8000 VRMS for 1 second (leakage same test conditions and operating tplh and tphi for any given device detection current limit, Io 5 A tcmpcraturc 18. No external pull up is required for a This test is pcrformcd before the 12. Single channel products only (HCPL high logic state on the enable input of 100% production test for partial 261A261N/061A061N) a single channel product. If the VE pin discharge(method b) shown in the 13. Common mode transient immunity in is not used, tying VE to Vcc will result VDE 0884 Insulation characteristics a Logic High level is the maximum in improved cmr performance Table, if applicable tolerable dVc/dt of the common 19 Measured between pins 1 and 2 7. In accordance with ull577 each mode pulse, VCM, to assure that the shorted together, and pins 3 and optocoupler is proof tested by output will remain in a logic high shorted together. For dual channel applying an insulation test voltage state (i.e. Vo>2.0 parts only l000 VRMS for I second (leakage detection current limit, ILo 3 A) igure 4. Typical High Level Output Figure 5. Low Level Output Current Figure 6. Typical Diode Input Current vs Temperature vS. Temperature Forward Current characteristi Figure 7. Typical Output voltage vs Figure 8. Typical Low Level Output Forward Input Current Voltage vS Temperature. Figure 9. Test circuit for tphl and tplh

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