Requirements on RAM Test
V1.2.0
R4.0 Rev 1
Table of Contents
1 Scope of this document....................................................................................... 4
2 How to read this document.................................................................................. 5
2.1 Conventions used......................................................................................... 5
2.2 Requirement structure.................................................................................. 5
3 Acronyms and abbreviations ............................................................................... 7
4 Requirement Specification................................................................................... 8
4.1 RAM Test ..................................................................................................... 8
4.1.1 Functional Overview.............................................................................. 8
4.1.2 Functional Requirements ...................................................................... 8
4.1.2.1 Configuration.................................................................................. 8
4.1.2.1.1 [BSW13800] Number of tested cells shall be changeable at
runtime 8
4.1.2.1.2 [BSW13801] Test cell size shall be a published parameter ........ 8
4.1.2.1.3 [BSW13802] Multiple RAM areas shall be configurable at post
build/ link time .............................................................................................. 9
4.1.2.1.4 [BSW13803] A subset of available RAM Test algorithms shall be
selectable at pre-compile time...................................................................... 9
4.1.2.1.5 [BSW13804] A subset of the pre-compile time selected RAM
Check test algorithms shall be selectable at runtime.................................... 9
4.1.2.2 Normal Operation......................................................................... 10
4.1.2.2.1 [BSW13805] Checkerboard test algorithm shall be available ... 10
4.1.2.2.2 [BSW13807] March test algorithm shall be available................ 10
4.1.2.2.3 [BSW13806] Walk path test algorithm shall be available.......... 10
4.1.2.2.4 [BSW13808] Galpat test algorithm shall be available ............... 11
4.1.2.2.5 [BSW13818] Transparent Galpat test algorithm shall be available
11
4.1.2.2.6 [BSW13813] Abraham test algorithm shall be available ........... 11
4.1.2.2.7 [BSW13809] RAM Test Execution Management ...................... 12
4.1.2.2.8 [BSW13810] Current status of RAM test execution per block
shall be available through a get status interface ........................................ 12
4.1.2.2.9 [BSW13820] RAM test execution status shall be provided by a
notification mechanism............................................................................... 12
4.1.2.2.10 [BSW13811] Non Destructive RAM Test ................................ 13
4.1.2.2.11 [BSW13812] Destructive RAM Test........................................ 13
4.1.3 Non-Functional Requirements (Qualities) ........................................... 14
4.1.3.1 [BSW13816] Effects of Instruction / Data queue shall be taken into
account 14
4.1.3.2 [BSW13821] The RAM Test Module shall be usable within SIL3
Environments................................................................................................. 14
5 References........................................................................................................ 15
5.1 Deliverables of AUTOSAR ......................................................................... 15
5.2 Related standards and norms .................................................................... 15
3 of 15 Document ID 114: AUTOSAR_SRS_RAMTest
- AUTOSAR confidential -
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2010-08-25
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j_b_0072012-11-14只是autosar规范的一个模块。看来很难找到比较全的中文资料
