#ifndef _HTC_H_
#warning Header file pic16f1947.h included directly. Use #include <htc.h> instead.
#endif
/* header file for the MICROCHIP PIC microcontroller
* 16F1947
*/
#ifndef __PIC16F1947_H
#define __PIC16F1947_H
//
// Configuration mask definitions
//
// Config Register: CONFIG1
#define CONFIG1 0x8007
// Oscillator Selection
// ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin
#define FOSC_ECH 0xFFFF
// ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin
#define FOSC_ECM 0xFFFE
// ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin
#define FOSC_ECL 0xFFFD
// INTOSC oscillator: I/O function on CLKIN pin
#define FOSC_INTOSC 0xFFFC
// EXTRC oscillator: External RC circuit connected to CLKIN pin
#define FOSC_EXTRC 0xFFFB
// HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_HS 0xFFFA
// XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_XT 0xFFF9
// LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins
#define FOSC_LP 0xFFF8
// Watchdog Timer Enable
// WDT enabled
#define WDTE_ON 0xFFFF
// WDT enabled while running and disabled in Sleep
#define WDTE_NSLEEP 0xFFF7
// WDT controlled by the SWDTEN bit in the WDTCON register
#define WDTE_SWDTEN 0xFFEF
// WDT disabled
#define WDTE_OFF 0xFFE7
// Power-up Timer Enable
// PWRT disabled
#define PWRTE_OFF 0xFFFF
// PWRT enabled
#define PWRTE_ON 0xFFDF
// MCLR Pin Function Select
// MCLR/VPP pin function is MCLR
#define MCLRE_ON 0xFFFF
// MCLR/VPP pin function is digital input
#define MCLRE_OFF 0xFFBF
// Flash Program Memory Code Protection
// Program memory code protection is disabled
#define CP_OFF 0xFFFF
// Program memory code protection is enabled
#define CP_ON 0xFF7F
// Data Memory Code Protection
// Data memory code protection is disabled
#define CPD_OFF 0xFFFF
// Data memory code protection is enabled
#define CPD_ON 0xFEFF
// Brown-out Reset Enable
// Brown-out Reset enabled
#define BOREN_ON 0xFFFF
// Brown-out Reset enabled while running and disabled in Sleep
#define BOREN_NSLEEP 0xFDFF
// Brown-out Reset controlled by the SBOREN bit in the BORCON register
#define BOREN_SBODEN 0xFBFF
// Brown-out Reset disabled
#define BOREN_OFF 0xF9FF
// Clock Out Enable
// CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#define CLKOUTEN_OFF 0xFFFF
// CLKOUT function is enabled on the CLKOUT pin
#define CLKOUTEN_ON 0xF7FF
// Internal/External Switchover
// Internal/External Switchover mode is enabled
#define IESO_ON 0xFFFF
// Internal/External Switchover mode is disabled
#define IESO_OFF 0xEFFF
// Fail-Safe Clock Monitor Enable
// Fail-Safe Clock Monitor is enabled
#define FCMEN_ON 0xFFFF
// Fail-Safe Clock Monitor is disabled
#define FCMEN_OFF 0xDFFF
// Config Register: CONFIG2
#define CONFIG2 0x8008
// Flash Memory Self-Write Protection
// Write protection off
#define WRT_OFF 0xFFFF
// 000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control
#define WRT_BOOT 0xFFFE
// 000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control
#define WRT_HALF 0xFFFD
// 000h to 3FFFh write protected, no addresses may be modified by EECON control
#define WRT_ALL 0xFFFC
// Voltage Regulator Capacitor Enable
// VCAP pin functionality is disabled
#define VCAPEN_OFF 0xFFFF
// VCAP functionality is enabled on VCAP pin
#define VCAPEN_ON 0xFFEF
// PLL Enable
// 4x PLL enabled
#define PLLEN_ON 0xFFFF
// 4x PLL disabled
#define PLLEN_OFF 0xFEFF
// Stack Overflow/Underflow Reset Enable
// Stack Overflow or Underflow will cause a Reset
#define STVREN_ON 0xFFFF
// Stack Overflow or Underflow will not cause a Reset
#define STVREN_OFF 0xFDFF
// Brown-out Reset Voltage Selection
// Brown-out Reset Voltage (VBOR) set to 1.9 V
#define BORV_19 0xFFFF
// Brown-out Reset Voltage (VBOR) set to 2.5 V
#define BORV_25 0xFBFF
// Low-Voltage Programming Enable
// Low-voltage programming enabled
#define LVP_ON 0xFFFF
// High-voltage on MCLR/VPP must be used for programming
#define LVP_OFF 0xDFFF
//
// Special function register definitions
//
// Register: INDF0
volatile unsigned char INDF0 @ 0x000;
// bit and bitfield definitions
// Register: INDF1
volatile unsigned char INDF1 @ 0x001;
// bit and bitfield definitions
// Register: PCL
volatile unsigned char PCL @ 0x002;
// bit and bitfield definitions
// Register: STATUS
volatile unsigned char STATUS @ 0x003;
// bit and bitfield definitions
volatile bit CARRY @ ((unsigned)&STATUS*8)+0;
volatile bit DC @ ((unsigned)&STATUS*8)+1;
volatile bit ZERO @ ((unsigned)&STATUS*8)+2;
volatile bit nPD @ ((unsigned)&STATUS*8)+3;
volatile bit nTO @ ((unsigned)&STATUS*8)+4;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned C : 1;
unsigned DC : 1;
unsigned Z : 1;
unsigned nPD : 1;
unsigned nTO : 1;
unsigned : 2;
unsigned : 1;
};
} STATUSbits @ 0x003;
#endif
// bit and bitfield definitions
// Register: FSR0L
volatile unsigned char FSR0L @ 0x004;
// bit and bitfield definitions
// Register: FSR0H
volatile unsigned char FSR0H @ 0x005;
// bit and bitfield definitions
// Register: FSR0
volatile unsigned int FSR0 @ 0x004;
// bit and bitfield definitions
// Register: FSR1L
volatile unsigned char FSR1L @ 0x006;
// bit and bitfield definitions
// Register: FSR1H
volatile unsigned char FSR1H @ 0x007;
// bit and bitfield definitions
// Register: FSR1
volatile unsigned int FSR1 @ 0x006;
// Register: BSR
volatile unsigned char BSR @ 0x008;
// bit and bitfield definitions
volatile bit BSR0 @ ((unsigned)&BSR*8)+0;
volatile bit BSR1 @ ((unsigned)&BSR*8)+1;
volatile bit BSR2 @ ((unsigned)&BSR*8)+2;
volatile bit BSR3 @ ((unsigned)&BSR*8)+3;
volatile bit BSR4 @ ((unsigned)&BSR*8)+4;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned BSR0 : 1;
unsigned BSR1 : 1;
unsigned BSR2 : 1;
unsigned BSR3 : 1;
unsigned BSR4 : 1;
};
struct {
unsigned BSR : 5;
};
} BSRbits @ 0x008;
#endif
// Register: WREG
volatile unsigned char WREG @ 0x009;
// bit and bitfield definitions
// Register: PCLATH
volatile unsigned char PCLATH @ 0x00A;
// bit and bitfield definitions
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned PCLATH : 7;
};
} PCLATHbits @ 0x00A;
#endif
// Register: INTCON
volatile unsigned char INTCON @ 0x00B;
// bit and bitfield definitions
volatile bit IOCIF @ (
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picc 9.81 include头文件(全) (1063个子文件)
pic16f1947.h 177KB
pic16f1946.h 177KB
pic16lf1947.h 177KB
pic16lf1946.h 177KB
pic16f946.h 133KB
pic16f1939.h 123KB
pic16f1937.h 123KB
pic16f1934.h 123KB
pic16lf1939.h 123KB
pic16lf1937.h 123KB
pic16lf1934.h 123KB
pic16f1527.h 119KB
pic16f1526.h 119KB
pic16lf1526.h 119KB
pic16lf1527.h 119KB
pic16f1938.h 113KB
pic16f1933.h 113KB
pic16f1936.h 113KB
pic16lf1938.h 112KB
pic16lf1933.h 112KB
pic16lf1936.h 112KB
pic16lf1829.h 106KB
pic16f1829.h 106KB
pic16lf1828.h 100KB
pic16f1828.h 100KB
pic16lf1847.h 99KB
pic16f1847.h 99KB
pic16lf1827.h 98KB
pic16f1827.h 98KB
pic16f914.h 97KB
pic16f917.h 97KB
pic16lf1782.h 95KB
pic16lf1783.h 95KB
pic16f1782.h 95KB
pic16f1783.h 95KB
pic16lf1824.h 94KB
pic16f1824.h 94KB
pic16lf1825.h 93KB
pic16f1825.h 93KB
pic16lf1823.h 86KB
pic16f1823.h 86KB
pic16lf1904.h 81KB
pic16lf1907.h 81KB
pic16lf1826.h 79KB
pic16f1826.h 79KB
pic16f916.h 78KB
pic16f913.h 78KB
pic12lf1822.h 76KB
pic12f1822.h 76KB
pic12f1840.h 72KB
pic12lf1840.h 72KB
pic16lf1906.h 70KB
pic16f1519.h 68KB
pic16f1517.h 68KB
pic16lf1519.h 68KB
pic16lf1517.h 68KB
pic16lf1903.h 64KB
pic16lf1902.h 64KB
pic16f707.h 64KB
cas16lf1946.h 64KB
cas16lf1947.h 64KB
as16lf1946.h 64KB
cas16f1946.h 64KB
cas16f1947.h 64KB
as16lf1947.h 64KB
as16f1946.h 64KB
as16f1947.h 64KB
pic16lf707.h 64KB
pic16f1518.h 63KB
pic16f1516.h 62KB
pic16lf1518.h 62KB
pic16lf1516.h 62KB
pic16f887.h 60KB
pic16f884.h 60KB
pic16f886.h 57KB
pic16f883.h 57KB
pic16f882.h 57KB
pic16cr926.h 53KB
pic16c925.h 53KB
pic16c926.h 53KB
pic16c765.h 53KB
pic16f690.h 52KB
pic16c924.h 52KB
pic16f727.h 51KB
pic16f724.h 51KB
pic16lf724.h 51KB
pic16lf727.h 51KB
pic16c923.h 49KB
pic16c745.h 49KB
pic16f722a.h 48KB
pic16f723a.h 48KB
pic16f777.h 48KB
pic16f747.h 48KB
pic16lf723a.h 48KB
pic16lf722a.h 48KB
cas16f946.h 48KB
as16f946.h 48KB
pic16f722.h 47KB
pic16f723.h 47KB
pic16f726.h 47KB
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