/******************************************************************************
* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
*
* This software component is licensed by HDSC under BSD 3-Clause license
* (the "License"); You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*/
/*****************************************************************************/
/** \file hc32f460_interrupts.c
**
** A detailed description is available at
** @link InterruptGroup Interrupt description @endlink
**
** - 2018-10-12 CDT First version for Device Driver Library of interrupt.
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "hc32f460_interrupts.h"
#include "hc32f460_utility.h"
#if (DDL_INTERRUPTS_ENABLE == DDL_ON)
/**
*******************************************************************************
** \addtogroup InterruptGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/*! Parameter validity check for null pointer. */
#define IS_NULL_POINT(x) (NULL != (x))
/*! Max IRQ Handler. */
#define IRQ_NUM_MAX (128u)
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
func_ptr_t IrqHandler[IRQ_NUM_MAX] = {NULL};
/**
*******************************************************************************
** \brief IRQ Registration
**
** param [in] pstcIrqRegiConf, IRQ registration
** configure structure
**
** retval Ok, IRQ register successfully.
** ErrorInvalidParameter, IRQ No. and
** Vector No. are not match.
** ErrorUninitialized, Make sure the
** Interrupt select register (INTSEL) is
** default value (0x1FFu) before setting.
**
*****************************************************************************/
en_result_t enIrqRegistration(const stc_irq_regi_conf_t *pstcIrqRegiConf)
{
// todo, assert ...
stc_intc_sel_field_t *stcIntSel;
en_result_t enRet = Ok;
//DDL_ASSERT(NULL != pstcIrqRegiConf->pfnCallback);
DDL_ASSERT(IS_NULL_POINT(pstcIrqRegiConf->pfnCallback));
/* IRQ032~127 whether out of range */
if (((((pstcIrqRegiConf->enIntSrc/32)*6 + 32) > pstcIrqRegiConf->enIRQn) || \
(((pstcIrqRegiConf->enIntSrc/32)*6 + 37) < pstcIrqRegiConf->enIRQn)) && \
(pstcIrqRegiConf->enIRQn >= 32))
{
enRet = ErrorInvalidParameter;
}
else
{
stcIntSel = (stc_intc_sel_field_t *)((uint32_t)(&M4_INTC->SEL0) + \
(4u * pstcIrqRegiConf->enIRQn));
if (0x1FFu == stcIntSel->INTSEL)
{
stcIntSel->INTSEL = pstcIrqRegiConf->enIntSrc;
IrqHandler[pstcIrqRegiConf->enIRQn] = pstcIrqRegiConf->pfnCallback;
}
else
{
enRet = ErrorUninitialized;
}
}
return enRet;
}
/**
*******************************************************************************
** \brief IRQ Resign
**
** param [in] enIRQn, IRQ enumunation (Int000_IRQn ~
** Int127_IRQn
**
** retval Ok, IRQ resign sucessfully.
** ErrorInvalidParameter, IRQ No. is out
** of range
**
*****************************************************************************/
en_result_t enIrqResign(IRQn_Type enIRQn)
{
stc_intc_sel_field_t *stcIntSel;
en_result_t enRet = Ok;
if ((enIRQn < Int000_IRQn) || (enIRQn > Int127_IRQn))
{
enRet = ErrorInvalidParameter;
}
else
{
stcIntSel = (stc_intc_sel_field_t *)((uint32_t)(&M4_INTC->SEL0) + (4ul * enIRQn));
stcIntSel->INTSEL = 0x1FFu;
IrqHandler[enIRQn] = NULL;
}
return enRet;
}
/**
*******************************************************************************
** \brief Share IRQ handler enable
**
** param [in] enIntSrc, interrupt souce, This parameter
** can be any value of @ref en_int_src_t
**
** retval Ok
**
******************************************************************************/
en_result_t enShareIrqEnable(en_int_src_t enIntSrc)
{
uint32_t *VSSELx;
//todo assert
VSSELx = (uint32_t *)(((uint32_t)&M4_INTC->VSSEL128) + (4u * (enIntSrc/32u)));
*VSSELx |= (uint32_t)(1ul << (enIntSrc & 0x1Fu));
return Ok;
}
/**
*******************************************************************************
** \brief Share IRQ handler disable
**
** param [in] enIntSrc, interrupt souce, This parameter
** can be any value of @ref en_int_src_t
**
** retval Ok
**
******************************************************************************/
en_result_t enShareIrqDisable(en_int_src_t enIntSrc)
{
uint32_t *VSSELx;
//todo assert
VSSELx = (uint32_t *)(((uint32_t)&M4_INTC->VSSEL128) + (4u * (enIntSrc/32u)));
*VSSELx &= ~(uint32_t)(1ul << (enIntSrc & 0x1Fu));
return Ok;
}
/**
*******************************************************************************
** \brief Enable stop mode wakeup source
**
** param [in] u32WakeupSrc, This parameter can be any
** composed value of @ref en_int_wkup_src_t
**
** retval Ok, corresponding wakeup source be enabled
** ErrorInvalidParameter, parameter with
** non-definition bits
**
******************************************************************************/
en_result_t enIntWakeupEnable(uint32_t u32WakeupSrc)
{
en_result_t enRet = Ok;
if (0ul != (u32WakeupSrc & 0xFD000000ul))
{
enRet = ErrorInvalidParameter;
}
else
{
M4_INTC->WUPEN |= u32WakeupSrc;
}
return enRet;
}
/**
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HC32F460基于Keil MDK 移植 RT-Thread Nano (107个子文件)
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keilkilll.bat 426B
hc32f460_interrupts.c 107KB
hc32f460_sdioc.c 96KB
hc32f460_timera.c 92KB
hc32f460_dmac.c 75KB
hc32f460_pwc.c 69KB
hc32f460_usart.c 67KB
hc32f460_adc.c 63KB
hc32f460_timer6.c 63KB
hc32f460_clk.c 62KB
hc32f460_timer4_oco.c 60KB
hc32f460_i2c.c 53KB
hc32f460_spi.c 49KB
hc32f460_mpu.c 44KB
hc32f460_cmp.c 41KB
hc32f460_dcu.c 41KB
hc32f460_timer4_cnt.c 37KB
hc32f460_timer0.c 34KB
hc32f460_rtc.c 34KB
hc32f460_qspi.c 32KB
hc32f460_efm.c 30KB
hc32f460_timer4_sevt.c 27KB
hc32f460_gpio.c 26KB
hc32f460_timer4_pwm.c 24KB
hc32f460_can.c 18KB
hc32f460_event_port.c 18KB
hc32f460_utility.c 18KB
hc32f460_i2s.c 17KB
hc32f460_emb.c 16KB
hc32f460_ots.c 14KB
hc32f460_exint_nmi_swi.c 13KB
system_hc32f460.c 12KB
hc32f460_timer4_emb.c 11KB
hc32f460_aes.c 11KB
hc32f460_crc.c 11KB
hc32f460_sram.c 11KB
hc32f460_hash.c 10KB
hc32f460_wdt.c 10KB
hc32f460_trng.c 10KB
hc32f460_keyscan.c 9KB
hc32f460_swdt.c 6KB
hc32f460_rmu.c 6KB
hc32f460_icg.c 3KB
usart.c 2KB
board.c 2KB
main.c 746B
finsh_port.c 592B
led.c 547B
hc32f460.h 2.04MB
hc32f460_timer6.h 35KB
hc32f460_timera.h 31KB
hc32f460_clk.h 29KB
hc32f460_sdioc.h 28KB
hc32f460_pwc.h 26KB
hc32f460_adc.h 24KB
hc32f460_can.h 22KB
hc32f460_qspi.h 22KB
hc32f460_icg.h 21KB
hc32f460_interrupts.h 21KB
hc32f460_spi.h 21KB
hc32f460_timer4_oco.h 17KB
hc32f460_usart.h 17KB
hc32f460_dmac.h 16KB
hc32f460_gpio.h 15KB
hc32f460_mpu.h 15KB
hc32f460_i2c.h 13KB
hc32f460_cmp.h 12KB
hc32f460_rtc.h 12KB
hc32f460_timer4_sevt.h 12KB
hc32f460_timer4_cnt.h 11KB
hc32f460_dcu.h 10KB
hc32f460_exint_nmi_swi.h 10KB
hc32f460_emb.h 10KB
hc32_common.h 9KB
hc32f460_timer0.h 9KB
hc32f460_i2s.h 8KB
hc32f460_efm.h 8KB
hc32_ddl.h 8KB
hc32f460_event_port.h 8KB
hc32f460_sram.h 8KB
hc32f460_timer4_pwm.h 8KB
hc32f460_keyscan.h 7KB
ddl_config.h 7KB
hc32f460_wdt.h 7KB
hc32f460_crc.h 5KB
hc32f460_timer4_emb.h 5KB
hc32f460_ots.h 5KB
system_hc32f460.h 4KB
hc32f460_rmu.h 4KB
hc32f460_utility.h 4KB
hc32f460_trng.h 4KB
rtconfig.h 3KB
hc32f460_swdt.h 3KB
hc32f460_aes.h 3KB
hc32f460_hash.h 3KB
main.h 1KB
usart.h 796B
finsh_config.h 731B
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