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千兆以太网PHY

RTL8211F

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RTL8211F-CG RTL8211FD-CG

RTL8211FI-CG RTL8211FDI-CG

INTEGRATED 10/100/1000M ETHERNET

PRECISION TRANSCEIVER

DATASHEET

(CONFIDENTIAL: Development Partners Only)

Rev. 1.7

28 December 2016

Track ID: JATR-8275-15

Realtek Semiconductor Corp.

No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan

Tel.: +886-3-578-0211 Fax: +886-3-577-6047

www.realtek.com

RTL8211F(I)-CG/RTL8211FD(I)-CG

Datasheet

Integrated 10/100/1000M Ethernet Precision Transceiver

iii

Track ID: JATR-8275-15 Rev. 1.

REVISION HISTORY

Revision Release Date Summary

1.0 2013/05/20 First release.

1.1 2014/04/09 Added RTL8211FD-CG, RTL8211FI-CG, and RTL8211FDI-CG data.

Corrected minor typing errors.

1.2 2014/07/09 Corrected minor typing errors.

Revised section 7.11.3 Change Page, page 20.

Revised section 7.14.1 Customized LED Function, page 27.

Revised section 7.17 PHY Reset (Hardware Reset), page 30.

Revised section 8 Register Descriptions, page 31.

Revised section 9 Regulators and Power Sequence, page 51.

Revised Table 57 Oscillator/External Clock Requirements, page 55.

Revised section 10.6.2 RGMII Timing Modes, page 58.

Revised section 12 Ordering Information, page 62.

1.3 2014/09/09 Corrected minor typing errors.

Revised section 3 System Applications, page 3.

Revised section 4 Block Diagram, page 5.

Revised section 6 Pin Descriptions, page 7.

Revised section 7.5 Interrupt, page 15.

Revised section 7.10 Green Ethernet (1000/100Mbps Mode Only), page 18.

Revised section 8 Register Descriptions, page 31.

Added section 8.3.24 MIICR (MII Control Register, Page 0xd08, Address 0x15), page 48.

1.4 2014/11/17 Revised section 7.14.1 Customized LED Function, page 27.

Revised section 8.3.17 PHYCR2 (PHY Specific Control Register 2, Page 0xa43, Address

0x19), page 45.

Revised section 8.3.24 MIICR (MII Control Register, Page 0xd08, Address 0x15), page

48.

1.5 2016/01/04 Added note below Figure 4 Pin Assignments, page 6 (Due to IC size restrictions, the

RTL8211FI, RTL8211FD, and RTL8211FDI do not show the ‘RTL’ part of the product

number on the IC).

1.6 2016/06/29 Revised section 11.1 Mechanical Dimensions Notes, page 61.

1.7 2016/12/28 Revised section 7.17 PHY Reset (Hardware Reset), page 30.

Revised Table 53 Power Sequence Parameters, page 53.

Revised Table 57 Oscillator/External Clock Requirements, page 55.

Revised Table 59 MDC/MDIO Management Timing Parameters, page 57.

RTL8211F(I)-CG/RTL8211FD(I)-CG

Datasheet

Integrated 10/100/1000M Ethernet Precision Transceiver

Track ID: JATR-8275-15 Rev. 1.7

Table of Contents

1. GENERAL DESCRIPTION..............................................................................................................................................1

2. FEATURES.........................................................................................................................................................................2

3. SYSTEM APPLICATIONS...............................................................................................................................................3

3.1. APPLICATION DIAGRAM - RTL8211F(I) ......................................................................................................................3

3.2. APPLICATION DIAGRAM - RTL8211FD(I) ...................................................................................................................4

4. BLOCK DIAGRAM...........................................................................................................................................................5

5. PIN ASSIGNMENTS .........................................................................................................................................................6

5.1. PACKAGE IDENTIFICATION...........................................................................................................................................6

6. PIN DESCRIPTIONS ........................................................................................................................................................7

6.1. TRANSCEIVER INTERFACE............................................................................................................................................7

6.2. CLOCK .........................................................................................................................................................................7

6.3. RGMII.........................................................................................................................................................................8

6.4. MANAGEMENT INTERFACE...........................................................................................................................................8

6.5. RESET ..........................................................................................................................................................................9

6.6. MODE SELECTION (HARDWARE CONFIGURATION) ......................................................................................................9

6.7. LED DEFAULT SETTINGS ...........................................................................................................................................10

6.8. REGULATOR AND REFERENCE....................................................................................................................................10

6.9. POWER AND GROUND ................................................................................................................................................11

7. FUNCTION DESCRIPTION ..........................................................................................................................................12

7.1. TRANSMITTER ............................................................................................................................................................12

7.1.1. 1000Mbps Mode...................................................................................................................................................12

7.1.2. 100Mbps Mode.....................................................................................................................................................12

7.1.3. 10Mbps Mode.......................................................................................................................................................12

7.2. RECEIVER...................................................................................................................................................................12

7.2.1. 1000Mbps Mode...................................................................................................................................................12

7.2.2. 100Mbps Mode.....................................................................................................................................................12

7.2.3. 10Mbps Mode.......................................................................................................................................................13

7.3. ENERGY EFFICIENT ETHERNET (EEE)........................................................................................................................13

7.4. WAKE-ON-LAN (WOL)............................................................................................................................................14

7.5. INTERRUPT .................................................................................................................................................................15

7.6. INTB/PMEB PIN USAGE ...........................................................................................................................................15

7.7. MDI INTERFACE ........................................................................................................................................................15

7.8. HARDWARE CONFIGURATION ....................................................................................................................................16

7.9. LED AND LDO CONFIGURATION ...............................................................................................................................17

7.10. GREEN ETHERNET (1000/100MBPS MODE ONLY) .....................................................................................................18

7.10.1. Cable Length Power Saving ............................................................................................................................18

7.10.2. Register Setting................................................................................................................................................18

7.11. MAC/PHY INTERFACE ..............................................................................................................................................19

7.11.1. RGMII..............................................................................................................................................................19

7.11.2. Management Interface .....................................................................................................................................19

7.11.3. Change Page ...................................................................................................................................................20

7.11.4. Access to MDIO Manageable Device (MMD).................................................................................................21

7.12. AUTO-NEGOTIATION..................................................................................................................................................21

7.12.1. Auto-Negotiation Priority Resolution..............................................................................................................24

RTL8211F(I)-CG/RTL8211FD(I)-CG

Datasheet

Integrated 10/100/1000M Ethernet Precision Transceiver

Track ID: JATR-8275-15 Rev. 1.

7.12.2. Auto-Negotiation Master/Slave Resolution .....................................................................................................24

7.12.3. Auto-Negotiation PAUSE/ASYMMETRIC PAUSE Resolution........................................................................25

7.13. CROSSOVER DETECTION AND AUTO-CORRECTION ....................................................................................................26

7.14. LED CONFIGURATION................................................................................................................................................27

7.14.1. Customized LED Function...............................................................................................................................27

7.14.2. EEE LED Function ..........................................................................................................................................29

7.15. POLARITY CORRECTION .............................................................................................................................................29

7.16. POWER .......................................................................................................................................................................30

7.17. PHY RESET (HARDWARE RESET) ..............................................................................................................................30

8. REGISTER DESCRIPTIONS.........................................................................................................................................31

8.1. REGISTER MAPPING AND DEFINITIONS.......................................................................................................................31

8.2. MMD REGISTER MAPPING AND DEFINITIONS............................................................................................................33

8.3. REGISTER TABLES......................................................................................................................................................33

8.3.1. BMCR (Basic Mode Control Register, Address 0x00) .........................................................................................33

8.3.2. BMSR (Basic Mode Status Register, Address 0x01).............................................................................................34

8.3.3. PHYID1 (PHY Identifier Register 1, Address 0x02) ............................................................................................36

8.3.4. PHYID2 (PHY Identifier Register 2, Address 0x03) ............................................................................................36

8.3.5. ANAR (Auto-Negotiation Advertising Register, Address 0x04) ...........................................................................36

8.3.6. ANLPAR (Auto-Negotiation Link Partner Ability Register, Address 0x05) .........................................................37

8.3.7. ANER (Auto-Negotiation Expansion Register, Address 0x06).............................................................................38

8.3.8. ANNPTR (Auto-Negotiation Next Page Transmit Register, Address 0x07) .........................................................39

8.3.9. ANNPRR (Auto-Negotiation Next Page Receive Register, Address 0x08)...........................................................39

8.3.10. GBCR (1000Base-T Control Register, Address 0x09).....................................................................................40

8.3.11. GBSR (1000Base-T Status Register, Address 0x0A) .......................................................................................40

8.3.12. MACR (MMD Access Control Register, Address 0x0D) .................................................................................41

8.3.13. MAADR (MMD Access Address Data Register, Address 0x0E)......................................................................41

8.3.14. GBESR (1000Base-T Extended Status Register, Address 0x0F) .....................................................................42

8.3.15. INER (Interrupt Enable Register, Page 0xa42, Address 0x12) .......................................................................43

8.3.16. PHYCR1 (PHY Specific Control Register 1, Page 0xa43, Address 0x18).......................................................44

8.3.17. PHYCR2 (PHY Specific Control Register 2, Page 0xa43, Address 0x19).......................................................45

8.3.18. PHYSR (PHY Specific Status Register, Page 0xa43, Address 0x1A) ..............................................................45

8.3.19. INSR (Interrupt Status Register, Page 0xa43, Address 0x1D) ........................................................................46

8.3.20. PAGSR (Page Select Register, Page 0xa43, Address 0x1F) ...........................................................................47

8.3.21. PHYSCR (PHY Special Cofig Register, Page 0xa46, Address 0x14) ..............................................................47

8.3.22. LCR (LED Control Register, Page 0xd04, Address 0x10) ..............................................................................47

8.3.23. EEELCR (EEE LED Control Register, Page 0xd04, Address 0x11)...............................................................48

8.3.24. MIICR (MII Control Register, Page 0xd08, Address 0x15) ............................................................................48

8.3.25. INTBCR (INTB Pin Control Register, Page 0xd40, Address 0x16) ................................................................48

8.3.26. PC1R (PCS Control 1 Register, MMD Device 3, Address 0x00) ....................................................................48

8.3.27. PS1R (PCS Status1 Register, MMD Device 3, Address 0x01) ........................................................................49

8.3.28. EEECR (EEE Capability Register, MMD Device 3, Address 0x14)................................................................49

8.3.29. EEEWER (EEE Wake Error Register, MMD Device 3, Address 0x16) ..........................................................49

8.3.30. EEEAR (EEE Advertisement Register, MMD Device 7, Address 0x3c) ..........................................................50

8.3.31. EEELPAR (EEE Link Partner Ability Register, MMD Device 7, Address 0x3d) ............................................50

9. REGULATORS AND POWER SEQUENCE................................................................................................................51

9.1. SWITCHING REGULATOR (RTL8211F(I) ONLY).........................................................................................................51

9.2. LOW-DROPOUT REGULATOR (RTL8211FD(I) ONLY) ...............................................................................................51

9.3. POWER SEQUENCE .....................................................................................................................................................52

10. CHARACTERISTICS.................................................................................................................................................54

10.1. ABSOLUTE MAXIMUM RATINGS.................................................................................................................................54

10.2. RECOMMENDED OPERATING CONDITIONS .................................................................................................................54

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