LTM4644 datasheet

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LIM4644 ELECTRICAL CHARACTERISTICS The o denotes the specifications which apply over the full operating temperature range, otherwise specifications are at Ta= 25C(Note 2). VIN=12V, per the typical application SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switching Regulator Section per Channel VIN SVI Input DC Voltage SVIN= VIN 14 VOUT(RANGE) Output Voltage Range 06 5.5 VOuT(DCY Output Voltage, Total Variation CIN=22uF, COuT=100uF Ceramic, RFB=40. 2K, with line and load MUDE=NVGN=Vt140r=0At04A(oe4)·14771.501523 RUN RUN Pin On Threshold VRUN RISing 121.251.3 la(shiNy Input Supply Bias current VIN= 12V, VOUT =1.5V, MODE=INTVCC mA VIN= 12V, VOUT = 1.5V, MODE=GND mA Shutdown, RUN=0, VIN=12V HA SIVIN) Input Supply Current VIN=12V, VouT=1.5V, IOUT=4A 0.62 A OUT(DC Output Continuous Current Range VIN= 12V, VouT=1. 5V(Note 4) 0 A AVOUT(Line)oUT Line Regulation Accuracy VOut =1.5V, VIN= 4V to 14V, IOuT =0A 0040.15% AVOUT( Load)/OUT Load Regulation Accuracy Vout =1.5V, lout= OA to 4A 0.5 VOUTIAcI Output Ripple voltage OuT=0A, CouT= 100HF Ceramic, VIN= 12V OUT=1.5V △ VOUTISTART) Turn-On Overshoot lOUT=OA, COUT 100uF Ceramic, VIN=12V, VOuT =1.5V DUT 0 tsp Turn-On Time COUT 100uF Ceramic, No Load, TRACK/SS=0.01uF, 2.5 ms VIN= 12V, VOUT=1.5V △ VOUtLS Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, CouT =47uF CeramIc, VIN= 12V, VOuT=1.5V SETTLE Settling Time for Dynamic Load Load: 0% to 50% to 0% of Full Load, COUT=47uF Step Ceramic, VIN=12V, VOUT=1.5V OUTPK Output Current Limit VIN= 12V, VOUT=1.5V Voltage at FB Pin our=0A,VouT=1.5V,0°cto125°c 05940.600.606 sAVV ouI=0A,vou=1.5V,-40°to125°0 05920.600.608 Current at fb pin (Note 3 ±30 nA Resistor Between VouT and FB 600560.406075kg Pins TRACK'SS Track Pin Soft-Start Pull-Up TRACK/SS=OV HA Current VIN Undervoltage Lockout VIN Falling 242.62.8 VIN Hysteresis 350 m ON(MIN) Minimum on-Time (Note 3 40 ns tOFF(MINy Minimum off-Time (Note 3 70 ns PGOOD Trip Level VEB With Respect to Set Output VEB Ramping Negative 13 10 % VEB Ramping positiv 1013 PGOOD Leakage IA PGooD Voltage LOW PGood= 1mA 0.020 Internal Vcc Voltage SIn= 4V to 14V 32333.4 VINTVCC Load Reg INTVcc Load Regulation Icc=OmA to 20mA 0.5 % OSC Oscillator Frequency MHz CLKIN CLKIN Threshold 0.7 4644fa LIEAR Formoreinformationwww.linearcom/ltm4644 3 LTM4644 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under absolute Maximum Ratings maximum ambient temperature consistent with these specifications is may cause permanent damage to the device. Exposure to any Absolute determined by specitic operating conditions in conjunction with board Maximum Rating condition for extended periods may affect device layout, the rated package thermal resistance and other environmental reliability and lifetime factors Note 2: The LTM4644 is tested under pulsed load conditions such that Note 3: 100% tested at wafer level TJ= TA. The LtM4644E is guaranteed to meet performance specifications Note 4: See output current derating curves for different ViN, VOuT and over the 0.C to 125C internal operating temperature range. Specifications over the tull -40"C to 125 C internal operating temperature range are Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction assured by design, characterization and correlation with statistical process temperature will exceed 125C When overtemperature protection is active controls. The LTM4644l is guaranteed to meet specifications over the fu‖l40°cto125° C internal operating temperature range. Note that the Continuous operation above the specitied maximum operating junction temperature may impair device reliabilit TYPICAL PERFORmAncE CHARACTERISTICS(Per Channel Efficiency vs Load Current from Efficiency vS Load Current from DCM Mode Efficiency from 5VIN(One Channel Operating) 12VIN(One Channel operating) 15V 70 90 50 80 5V0 33V OUT 25V OUT 18V OUT OUT 1.5V OUT 10 5VIN 1.vOUt OUT 2 0 0.001 0.0 LOAD CURRENT (A) LOAD CURRENT (A) LOAD CURRENT (A) 464 41G01 1.0V Output Transient Response 1. 5v Output Transient Response 2.5V Output Transient Response 50mV/DIV 50mV/DIV AC-COU AC-COUPLED AC-COUPLED LOAD STEP LOAD STEP LOAD STEP 1ADⅣV 1A/DⅣ 1ADIV 20us/DⅣ 20us/DⅣ 20uS/DIV VIN= 12V, VOuT= 1V, IOuT=3A TO 4A, 1A/Hs VIN= 12V, VouT =1.5V, IOuT= 3A TO 4A, 1A/Is VIN= 12V, VouT =2.5V, lOuT= 3A TO 4A, 1A/s CFF= 10pF F 0 UTPUT CAPACITOR=1·47μ F CERAMIC 0 UTPUT CAPACITOR=1·47μ CERAMIC OUTPUT CAPACITOR=1.47UF CERAMIC 4644fa 4 LEAR LIM4644 TYPICAL PERFORMAOCE CHARAGTERISTICS 3.3V Output Transient Response 5V Output Transient Response Start-Up with No Load OUT 50m//DIV awiniswies 50mV/DIV gesse AC-COUPLED AC-COUPLED O1A/DIV LOAD STEP LOAD STEP OUT ADIV 1A/DⅣ 0.5VDⅣV 20us/DⅣ 20us/DⅣ 4644G08 5ms/DV 4644G09 VIN= 12V, VOUT =3.3V, lOuT=3A TO 4A, 1A/us VIN= 12V, VOUT= 5V, IOuT=3ATO 4A, 1A/us VIN=12V, VOUT =1.5V OUTPUT CAPACITOR= 47UF CERAMIC OUTPUT CAPACITOR=47UF CERAMIC INPUT CAPACITOR= 150HF SANYO ELECTROLYTIC CAPACITOR (OPTIONAL)+22uF CERAMIC CAPACITO OUIPUI CAPACIIOR 47uF CERAMIC CAPACI IOR SOFT-START CAPACITOR =0.1uF Start-Up with 4A Load Short-circuit with no load Short-Circuit with 4A load N 0.2A/DIV 0.5A/DIV O5A/DIV OUT 0.5V/DIV 0.5V/D|V 5ms/DIV 20us/DIV 20US/DIV ⅥN=12V,vouT=15V VIN= 12V, VOUT=1.5V VIN= 12V, VOUT = 1.5V PUT CAPACITOR= 150HF SANYO ELECTROLYTIC INPUT CAPACITOR=150u F SANYO ELECTROLYTIC NPUT CAPACITOR- 150HF SANYO ELECTROLYTI CAPACITOR (OPTIONAL)+ 22UF CERAMIG CAPACI TOR CAPAC!IOR (OPTIONAL)+ 22uF CERAMIC CAPACI IOR CAPACIT OR (OPT IONAL)+ 22UF CERAMIC CAPACITOR OUTPUT CAPACITOR-47HF CERAMIC CAPACITOR OUTPUT CAPACITOR=47HF CERAMIC CAPACITOR OUTPUT CAPACITOR-47HF CERAMIC CAPACITOR SOFT-START CAPACITOR=0.1uF Recovery to No Load from Short-circuit Output Ripple Start Into Pre-Biased Output 2V/DIV AC-GOUPLE 20A/DIV N=12V DIV 4544013 N=12V V 500uS/DV 4644G14 VIN 12V 1 us/DIV 4644C15 VOUT= 1V V INPUT CAPACITOR= 22HF SANYO ELECTROLYTIC I PUT CAPACITOR= 22HF SANYO ELECTROLYTI INPUT CAPACITOR= 22HF SANYO ELECTROLYTIC CAPACITOR (OPTIONAL)+ 2x 22uF CERAMIC CAP CAPACITOR (OPTIONAL)+ 2x 22uF CERAMIC CAP CAPACITOR (OPTIONAL)+2x 22uF CERAMIC CAP OUTPUT CAPACITOR 2x 47uF CERAMIC CAP OUTPUT CAPACITOR=2x 47HF CERAMIC CAP OUTPUT CAPACITOR= 2x 47HF CERAMIC CAP SOFT-START CAPACITOR=0.1uF SOFT-START CAPACITOR=0.1uF SOFT-START CAPACITOR=0.1HF 20MHZ MEASUREMENT BANDWIDTH 4644fa LIEAR Formoreinformationwww.linearcom/ltm4644 LTM4644 n FUnCTIOnS △ PACKAGE ROW AND COLUMN LABELING MAY VARY SVIN1, SVIN2, SVIN, SVIN(B5, E5, H5, L5): Signal VIN AMONG MOdule PRODUCTS. REVIEW EACH PACKAGE Filtered input voltage to the internal 3. 3V regulator for LAYOUT CAREFULLY the control circuitry of each Switching mode Regulator OUT1(A1, A2, A3), VOuT2(C1, D1, D2), VouT3(F1, Channel. Tie this pin to the ViN pin respectively in most G1, G2), VOuT4 J1, K1, K2 ) Power Output Pins of Each applications. Connect Svin to an external voltage supply Switching Mode Regulator Channel. Apply output load of at least 4V which must also be greater than Vout between these pins and gNd pins. Recommend placing output decoupling capacitance directly between these pins TRACK/SS1, TRACK/SS2, TRACK/SS3, TRACK/SS4 (A6 and gNd pins. See the applications Information section D6, G6, K6): Output Tracking and Soft-Start Pin of Each for paralleling outputs Switching Mode Regulator Channel. Allows the user to control the rise time of the output voltage. Putting a volt GND (A4-A5, B1-B2, C5, D3-D5, E1-E2, F5, G3-G5, age below 0. 6V on this pin bypasses the internal reference H1-H2, J5, K3-K4, L1-L2): Power Ground Pins for Both input to the error amplifier, instead it servos the FB pin Input and output returns. use large pcb copper areas to to match the tracK voltage. above 0.6v, the tracking connect all gnd together function stops and the internal reference resumes control vN1(B3,B4),VN2(E3,E4),vN3(H3,H4,V1N4(L3,L4) of the error amplifier. There's an internal 2. 5ua pull-up current from INTVcc on this pin, So putting a capacitor Power input pins connect to the drain of the internal top here provides soft-start function MOSFET for each switching mode regulator channel Apply input voltages between these pins and gNd pins. MODEl, MODE2, MODE3, MODE4(B6, E6, H6, L6) Recommend placing input decoupling capacitance directly Operation Mode select for Each Switching Mode regula between each of Vin pins and GND pins tor Channel. Tie this pin to INTVcc to force continuous PGOOD1, PGOOD2, PGOOD3, PGOOD4( C3, C2, F2 synchronous operation at all output loads. Tying it to J2) Output Power Good with Open-Drain Logic of Each SGND enables discontinuous current mode operation at Switching Mode regulator Channel. PGOOD is pulled to light loads Do not leave floating ground when the voltage on the FB pin is not within +10% RUN1, RUN2, RUN3, RUN4(C6, F6, J6, K7): Run Control of the internal o, 6v reference Input of Each Switching Mode regulator channel. Enable CLKOUT (J3 ): Output Clock Signal for Poly Phase Opera regulator operation by tying the specific run pin above tion of the Module. The phase of clKout with respect to 1.2V. Pulling it below 1.1V shuts down the respective CLKiN is set to 180. CLKOUT's peak-to-peak amplitude regulator channel. Do not leave floating is INTVcc to GND. See the Application Information section FB1, FB2, FB3, FB4 (A7, D7, G7, J7): The Negative Input for details. Strictly output; do not drive this pin of the error amplifier for Each Switching Mode regulator INTVcC1, INTVcc2, INTVCC3, INTVcC4(C4, F4, J4, K5) Channel. Internally, this pin is connected to VoUT of each Internal 3. 3V Regulator Output of Each Switching Mode channel with a 60 4k@2 precision resistor Different output Regulator Channel. The internal power drivers and con voltages can be programmed with an additional resistor trol circuits are powered from this voltage. Each pin is between the Fb and GNd pins. In poly Phase operation internally decoupled to GNd with 1 uF low ESR ceramic tying the Fb pins together allows for parallel operation capacitor already See the applications Information section for details 4644fa LEAR LIM4644 n FUnCTIOnS COMP1, COMP2, COMP3, COMP4 (B7, E7, H7, L7): Cur- SGND (F7): Signal Ground Connection. SGND is connected ent Control Threshold and Error Amplifier Compensation to GND internally through single point. Use a separated Point of Each Switching Mode Regulator Channel. The SGNd ground copper area for the ground of the feedback internal current comparator threshold is proportional to resistor and other components connected to signal pins this voltage. Tie the COMP pins together for parallel opera- A second connection between the PGnd plane and SGND tion. The device is internally compensated plane is recommended on the backside of the PCb under CLKIN (C7): EXternal Synchronization Input to Phase neath the module Detector of the Module. This pin is internally terminated TEMP (F3 Onboard Temperature Diode for Monitoring to SGNd with 20kQ2 The phase-locked loop will force the VBE Junction Voltage Change with Temperature. See the channel 1 turn-on signal to be synchronized with the the applications Information section rising edge of the ClKin signal Channel 2, channel 3 and channel 4 will also be synchronized with the rising edge of the clkin signal with a pre-determined phase shift. See the applications Information section for details 4644fa LIEAR Formoreinformationwww.linearcom/ltm4644 LTM4644 BLOCK DIAGRAm VOUT1 CLKIN PGOOD1 INTVcC1 60.4k NTCc 64k之 47014V 1uF 士 POWER CONTROL VOuT1 luF 0.1uF COMP1 CLKOU INTERNAL SGND COMP FILTER GND FREQ1 OUT2 PG0OD2 SVINO NTV VIr 402k CLKIN TRACK/SS2 POWER CONTROL 15V 4A luF 47uF 0.1u COMP2 CLKOUT INTERNAL COMP NTERNAL FILIER FREQ V PGOOD3 604k 30.1k 士 CLKIN TRACK/SS3 POWER CONTROI 0.1pF COMP3 CLKOUT INTERNAL COMP NTERNAL FILTER FREQ3 OJT4 PGCOD4 100k W-INTVcC4 FB4 SvIN4 909k 22F V TRACK/SS4 POWER CONTRO 4A 1uF GND COMP4 CLKOU INTERNA COMP INTERNAL FILTER TEMP FREQ4 CLKOUT 4644fa LEAR LIM4644 DECOUPLInG REQUIREMEnTS (per Channel) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CIN (iN= 4V to 14V, VoUT=1.5v/ent External Input Capacitor Requirer OUT 4A 4.7 uF OUT External Output Capacitor Requirement OUT 4A uF (VIN=4V to 14V, VOUT=1.5V) OPERATIOn The LTM4644 is a quad output standalone non-isolated is more than flexible in a multirail pol application like switch mode DC/DC power supply. It has four separate FPGA. Furthermore, the lTM4644 has clKin and clk regulator channels with each of them capable of delivering out pins for frequency synchronization or poly phasing up to 4A continuous output current with few external input multiple devices which allow up to 8 phases cascaded to and output capacitors. Each regulator provides precisely run simultaneously egulated output voltage programmable from 0.6V to Current mode control also provides cycle-by-cycle fast 5.5v via a single external resistor over 4v to 14v input current monitoring. Foldback current limiting is provided voltage range. With an external bias voltage, this module in can operate from an input voltage as low as 2. 375V. the in an overcurrent condition to reduce the inductor valley typical application schematic is shown in Figure 33 current to approximately 40%of the original value when oB drops. An internal overvoltage and undervoltage The LTM4644 integrates four separate constant frequency comparators pull the open-drain PGood output low if controlled on-time valley current mode regulators, power the output feedback voltage exits a + 10% window around rting discrete com- the regulation point. continuous conduction mode (cCm MOSFETS, inductors, and other supporting discrete com ponents. The typical switching frequency is set to 1MHz. operation is forced during oV and Uv conditions except For switching noise-sensitive applications, the u module during start-up when the track pin is ramping up to 0.6v regulator can be externally synchronized to a clock from Pulling the run pin below 1. 1 V forces the controller into 700kHz to 1.3MHZ. See the Applications Information its shutdown state, turning off both power MOSFETS and section most of the internal control circuitry. At light load cur- With current mode control and internal feedback loop rents, discontinuous conduction mode(DCM)operation compensation, the LTM4644 module has sufficient stabil- can be enabled to achieve higher efficiency compared to ty margins and good transient performance with a wide continuous conduction mode(CCm) by setting the MODE range of output capacitors, even with all ceramic output pin to SGND. The tracK/sS pin is used for power supply capacitors tracking and soft-start programming See the applications Current mode control provides the flexibility of paralleling Information section any of the separate regulator channels with accurate cur- Atemperature diode is included inside the module to moni- rent sharing With a built-in clock interleaving between tor the temperature of the module See the applications each two regulator channels, the LTM4644 could easily Information section for details employ a 2 +2, 3+1 or 4 channels parallel operation which 4644fa LIEAR Formoreinformationwww.linearcom/ltm4644 9 LTM4644 APPLICATIOnS OFORMCTIOO The typical LTM4644 application circuit is shown in the FB and comp pins together for each paralleled output Figure 33. External component selection is primarily With a single resistor to GNd as determined by determined by the input voltage, the output voltage and 60.4k the maximum load current. Refer to Table 7 for specific external capacitor requirements for a particular application B OUT VIN to Vou Step-Down Ratios 0.6 There are restrictions in the maximum VIn and vout step- Input Decoupling Capacitors down ratio that can be achieved for a given input voltage The LTM4644 module should be connected to a low ac due to the minimum off-time and minimum on-time limits of each regulator the minimum off-time limit imposes a impedance DC source. For each regulator channel, a 10uF maximum duty cycle which can be calculated as input ceramic capacitor is recommended for RMS ripple current decoupling a bulk input capacitor is only needed MAX=1-tFN)·fsw when the input source impedance is compromised by long where toFF(MIN) is the minimum otf-time, 70ns typical for nductive leads, traces or not enough source capacitance LTM4644, and tsw is the switching frequency. Conversely The bulk capacitor can be an electrolytic aluminum capaci the minimum on-time limit imposes a minimum duty cycle tor or polymer capacitor of the converter which can be calculated as Without considering the inductor ripple current, the rMs DMN= toN(MIN)·fsw current of the input capacitor can be estimated as where toN(MIN)is the minimum on-time, 40ns typical for OUT(MAX) CIN(RMS) (1-D) LTM4644. In the rare cases where the minimum duty m% cycle is surpassed, the output voltage will still remain regulation, but the switching frequency will decrease where is the estimated efticiency of the power module from its programmed value. Note that additional thermal derating may be applied. See the Thermal Considerations Output Decoupling Capacitors and Output Current Derating section in this data sheet. With an optimized high frequency, high bandwidth design only single piece of low ESR output ceramic capacitor is Output Voltage Programming required for each regulator channel to achieve low output The PWMcontroller has an internal 0. 6V reference voltage. voltage ripple and very good transientresponse Additiona As shown in the Block Diagram, a 60. 4k internal feedback output filtering may be required by the system designer, resistor connects each regulator channel from VouT pin to if further reduction of output ripples or dynamic transient FBpin. Adding a resistor ReB from FB pin to GND programs spikes is required. Table 7 shows a matrix of ditferent the output voltage output voltages and output capacitors to minimize the 加09=出 voltage droop and overshoot during a 2a load step tran sient. Multiphase operation will reduce effective output JUT ripple as a function of the number of phases. Application 0.6 Note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance will be Table 1. vEb Resistor Tab le vs Various Output Voltages more a function of stability and transient response. the vour(V) LT powerCADTM Design Tool is available to download online RFB(k)0pen90.960440.230.119.11338.25 or output ripple, stability and transient response analysis For parallel operation of N channels, use the following and calculating the output ripple reduction as the number equation can be used to solve for RFB Tie the VOut and of phases implemented increases by n times 4644fa LEAR

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    wshylb 比较实用的一种电源芯片,很流行。
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