/**************************************************************************//**
* @file system_LPC8xx.c
* @brief CMSIS Device System Source File for
* NXP LPC81x Device Series
* @version V1.10
* @date 19. August 2014
*
* @note
* Copyright (C) 2014 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#include <stdint.h>
#include "LPC8xx.h"
/*
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
*/
/*- SystemCoreClock Configuration -------------------------------------------*/
// <e0> SystemCoreClock Configuration
#define CLOCK_SETUP 1
//
// <h> System Oscillator Control (SYSOSCCTRL)
// <o.0> BYPASS: System Oscillator Bypass Enable
// <i> If enabled then PLL input (sys_osc_clk) is fed
// <i> directly from XTALIN and XTALOUT pins.
// <o.1> FREQRANGE: System Oscillator Frequency Range
// <i> Determines frequency range for Low-power oscillator.
// <0=> 1 - 20 MHz
// <1=> 15 - 25 MHz
// </h>
#define SYSOSCCTRL_Val 0x00000000 // Reset value: 0x000
//
// <o.0..1> System PLL Clock Source Select (SYSPLLCLKSEL)
// <0=> IRC Oscillator
// <1=> Crystal Oscillator (SYSOSC)
// <3=> CLKIN pin
#define SYSPLLCLKSEL_Val 0x00000000 // Reset value: 0x000
//
// <e> Clock Configuration (Manual)
#define CLOCK_SETUP_REG 1
//
// <h> WDT Oscillator Setting (WDTOSCCTRL)
// <o.0..4> DIVSEL: Select Divider for Fclkana
// <i> wdt_osc_clk = Fclkana / (2 � (1 + DIVSEL))
// <0-31>
// <o.5..8> FREQSEL: Select WD Oscillator Analog Output Frequency (Fclkana)
// <1=> 0.6 MHz
// <2=> 1.05 MHz
// <3=> 1.4 MHz
// <4=> 1.75 MHz
// <5=> 2.1 MHz
// <6=> 2.4 MHz
// <7=> 2.7 MHz
// <8=> 3.0 MHz
// <9=> 3.25 MHz
// <10=> 3.5 MHz
// <11=> 3.75 MHz
// <12=> 4.0 MHz
// <13=> 4.2 MHz
// <14=> 4.4 MHz
// <15=> 4.6 MHz
// </h>
#define WDTOSCCTRL_Val 0x00000180 // Reset value: 0x0A0
//
// <h> System PLL Setting (SYSPLLCTRL)
// <i> F_clkout = M * F_clkin = F_CCO / (2 * P)
// <i> F_clkin must be in the range of 10 MHz to 25 MHz
// <i> F_CCO must be in the range of 156 MHz to 320 MHz
// <o.0..4> MSEL: Feedback Divider Selection
// <i> M = MSEL + 1
// <0-31>
// <o.5..6> PSEL: Post Divider Selection
// <i> Post divider ratio P. Division ratio is 2 * P
// <0=> P = 1
// <1=> P = 2
// <2=> P = 4
// <3=> P = 8
// </h>
//#define SYSPLLCTRL_Val 0x00000041 // For 24 MHz // Reset value: 0x000
#define SYSPLLCTRL_Val 0x00000024 // For 30 Mhz // Reset value: 0x000
//
// <o.0..1> Main Clock Source Select (MAINCLKSEL)
// <0=> IRC Oscillator
// <1=> PLL Input
// <2=> WD Oscillator
// <3=> PLL Output
#define MAINCLKSEL_Val 0x00000003 // Reset value: 0x000
//
// <o.0..7> System AHB Clock Divider (SYSAHBCLKDIV.DIV)
// <i> Divides main clock to provide system clock to core, memories, and peripherals.
// <i> 0 = is disabled
// <0-255>
//#define SYSAHBCLKDIV_Val 0x00000001 // For 24 MHz // Reset value: 0x001
#define SYSAHBCLKDIV_Val 0x00000002 // For 30 MHz // Reset value: 0x001
// </e>
//
// <e> Clock Configuration (via ROM PLL API)
#define CLOCK_SETUP_API 0
//
// <o> PLL API Mode Select
// <0=> Exact
// <1=> Less than or equal
// <2=> Greater than or equal
// <3=> As close as possible
#define PLL_API_MODE_Val 3
//
// <o> CPU Frequency [Hz] <1000000-30000000:1000>
#define PLL_API_FREQ_Val 30000000
// </e>
//
// <o0>System Oscillator (XTAL) Frequency [Hz] <1000000-25000000>
// <i> XTAL frequency must be in the range of 1 MHz to 25 MHz
//
#define XTAL_CLK_Val 12000000ul
/*
//-------- <<< end of configuration section >>> ------------------------------
*/
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define __XTAL_CLK ( XTAL_CLK_Val) /* Oscillator freq */
#define __SYS_OSC_CLK ( __XTAL_CLK) /* System oscillator freq */
#define __IRC_OSC_CLK ( 12000000UL) /* Internal RC oscillator freq */
#define __CLKIN_CLK ( 12000000UL) /* CLKIN pin frequency */
/*----------------------------------------------------------------------------
Check the register settings
*----------------------------------------------------------------------------*/
#define CHECK_RANGE(val, min, max) ((val < min) || (val > max))
#define CHECK_RSVD(val, mask) (val & mask)
#if (CHECK_RSVD((SYSOSCCTRL_Val), ~0x00000003))
#error "SYSOSCCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((WDTOSCCTRL_Val), ~0x000001FF))
#error "WDTOSCCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RANGE((SYSPLLCLKSEL_Val), 0, 3))
#error "SYSPLLCLKSEL: Value out of range!"
#endif
#if (CHECK_RSVD((SYSPLLCTRL_Val), ~0x0000007F))
#error "SYSPLLCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((MAINCLKSEL_Val), ~0x00000003))
#error "MAINCLKSEL: Invalid values of reserved bits!"
#endif
#if (CHECK_RANGE((SYSAHBCLKDIV_Val), 0, 255))
#error "SYSAHBCLKDIV: Value out of range!"
#endif
#if ( CLOCK_SETUP_REG == CLOCK_SETUP_API )
#error "You must select either manual or API based Clock Configuration!"
#endif
#if (CHECK_RANGE(XTAL_CLK_Val, 1000000, 25000000))
#error "XTAL frequency is out of bounds"
#endif
#if (CHECK_RANGE(PLL_API_MODE_Val, 0, 3))
#error "PLL API Mode Select not valid"
#endif
#if (CHECK_RANGE(PLL_API_FREQ_Val, 1000000, 30000000))
#error "CPU Frequency (API mode) not valid"
#endif
/*----------------------------------------------------------------------------
Calculate system core clock
*----------------------------------------------------------------------------*/
#if (CLOCK_SETUP) /* Clock Setup */
/* sys_pllclkin calculation */
#if ((SYSPLLCLKSEL_Val & 0x03) == 0)
#define __SYS_PLLCLKIN (__IRC_OSC_CLK)
#elif ((SYSPLLCLKSEL_Val & 0x03) == 1)
#define __SYS_PLLCLKIN (__SYS_OSC_CLK)
#elif ((SYSPLLCLKSEL_Val & 0x03) == 3)
#define __SYS_PLLCLKIN (__CLKIN_CLK)
#else
#error "Oops"
#endif
#if (CLOCK_SETUP_REG == 1) /* Clock Setup via Register */
#define __FREQSEL ((WDTOSCCTRL_Val >> 5) & 0x0F)
#define __DIVSEL (((WDTOSCCTRL_Val & 0x1F) + 1) << 1)
#if (__FREQSEL == 0)
#error "WDTOSCCTRL.FREQSEL undefined!"
#eli
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LCD5110+LPC824+menu单片机菜单系统
共184个文件
xcl:41个
h:40个
o:32个
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2017-06-07
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IAR IDE,LPC824 MCU menu 单片机菜单系统。 LCD5110作为display内包含LCD驱动,字库,LPC官方库。 menu可以很容易移植到其它MCU上,也可以移植到其它LCD上面。
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LCD5110+LPC824+menu单片机菜单系统 (184个子文件)
LPC824_menu.MenuSecond.cspy.bat 2KB
LPC824_menu.MenuFirst.cspy.bat 2KB
LPC824_menu.Debug.cspy.bat 2KB
LPC824_menu.pbd.browse 281KB
LPC824_menu.pbd.browse 266KB
system_LPC8xx.c 18KB
utilities.c 12KB
menu.c 7KB
sys.c 7KB
Nokia5110.c 6KB
AppMain.c 6KB
IAR_Redirect.c 4KB
lpc8xx_gpio.c 4KB
usart.c 3KB
Example_Multi_Timer_Blinky_ISR.c 3KB
lpc8xx_i2c.c 2KB
delay.c 2KB
menu_task.c 2KB
Keil_Retarget.c 1KB
LPCXpresso_Retarget.c 1KB
TEST.c 917B
LPC824_menu.crun 351B
LPC824_menu.dbgdt 63B
LPC824_menu.dep 42KB
LPC824_menu.dni 1KB
LPC824_menu.ewd 175KB
LPC824_menu.ewp 106KB
LPC824_menu.ewt 264KB
LPC8xx.h 51KB
core_cm0plus.h 39KB
FONT6x8.h 21KB
Bitmap.h 20KB
core_cmInstr.h 17KB
core_cmFunc.h 15KB
Font8_16.h 15KB
API_header.h 8KB
menu_table.h 7KB
lpc_types.h 6KB
Font6_8.h 6KB
Nokia5110.h 5KB
menu.h 4KB
menu_first.h 4KB
sys.h 4KB
FONT16x16.h 3KB
Icon10_8.h 3KB
lpc8xx_spi.h 3KB
lpc8xx_i2c.h 3KB
lpc8xx_swm.h 3KB
PICTURE.h 3KB
lpc8xx_gpio.h 3KB
lpc8xx_uart.h 3KB
lpc8xx_adc.h 2KB
lpc8xx_syscon.h 2KB
lpc8xx_sct.h 2KB
lpc8xx_dma.h 2KB
system_LPC8xx.h 2KB
Font16_16.h 1KB
board.h 1KB
usart.h 1KB
lpc8xx_acomp.h 1018B
delay.h 876B
menu_task.h 844B
utilities.h 763B
Example_Multi_Timer_Blinky.h 758B
lpc8xx_mrt.h 714B
includes.h 463B
lpc8xx_wkt.h 342B
lpc8xx_wwdt.h 308B
LPC824_menu_MenuSecond.jlink 755B
LPC824_menu.pbd.linf 1KB
LPC824_menu.pbd.linf 1KB
LPC824_menu.pbd.linf 1KB
LPC824_menu.map 24KB
LPC824_menu.map 24KB
LPC824_menu.map 23KB
menu_fun.o 72KB
menu.o 63KB
menu.o 62KB
menu.o 62KB
Nokia5110.o 45KB
Nokia5110.o 44KB
Nokia5110.o 44KB
state_machine.o 39KB
utilities.o 32KB
utilities.o 32KB
utilities.o 32KB
AppMain.o 22KB
AppMain.o 21KB
AppMain.o 21KB
Example_Multi_Timer_Blinky_ISR.o 14KB
Example_Multi_Timer_Blinky_ISR.o 13KB
Example_Multi_Timer_Blinky_ISR.o 13KB
lpc8xx_gpio.o 13KB
lpc8xx_gpio.o 12KB
lpc8xx_gpio.o 12KB
system_LPC8xx.o 12KB
system_LPC8xx.o 11KB
system_LPC8xx.o 11KB
menu_task.o 11KB
menu_task.o 10KB
共 184 条
- 1
- 2
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