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28-Sep-2012

MIPI Alliance Member Confidential.

MIPI

Alliance Specification for

Serial Low-power Inter-chip Media Bus (SLIMbus®)

Version 1.1 – 28 September 2012

* NOTE TO IMPLEMENTERS *

This document is a Specification. MIPI member companies’ rights and obligations apply to this Specification

as defined in the MIPI Membership Agreement and MIPI Bylaws.

The following table includes a list of technical updates made to this document since MIPI Alliance

Specification for Serial Low-power Inter-chip Media Bus (SLIMbus®) v1.01.01 was released on 14 July

2008. Note, the table does not include editorial Corrections such as page formatting, typographical changes

or paragraph and character style changes.

Section Description

4.4.3 Clarified the requirement for Component support of Root Frequency, Clock Gear and

Subframe Modes.

6.1 Minor wording updates, such as Cells within a Slot, Slots within a Subframe.

6.4.2 Added definition of Segment Offset with respect to Control Space Width.

7.1 Added Figure 33 “Example Information Slice using Elemental Access”.

7.1.2 Clarified description of how to clear Information Elements.

7.1.2.4 Added requirement for clearing the RECONFIG_OBJECTION Information Element.

8.2.1.3 Added requirements after Table 30 “Arbitration Priority Codes” for using Arbitration

Priority codes.

8.2.3 Added cross-reference to Section 11 “Core Message”.

8.4.2 Added requirement for the Active Manager to keep the Enumeration Address of a

Device to be assigned a Logical Address.

8.4.2.5 Clarified requirements and text regarding parsing of the Remaining Length field.

28-Sep-2012

MIPI Alliance Member Confidential.

Section Description

9.3.5.4.2 Deleted sentence regarding two successive bit errors.

9.3.5.5 Updated the comment for “Segment i+2” and replaced the T1 value to indicate the

primary owner is requesting channel ownership.

9.5 Added paragraph describing the Port behavior when an unsupported Data Type

request has been received.

9.5 Added definition of PDM Data Type. Also added Figure 54 “Packed PDM Segment

DATA Field”.

10.1.2 Added requirement for Clock Receiver Components to support the synchronization

for any combination of Clock Gear, Root Frequency and Subframe Mode.

10.1.2.1 Clarified the definition of the Undefined State.

10.1.2.4 Minor wording updates.

10.2.2 Updated first paragraph.

10.3.1 Added paragraph stating certain combinations of NEXT_MESSAGES are forbidden.

10.3.2 Rewording after Figure 67 “Restart of a Paused Bus Clock” for the Restart after

Paused Clock. Paragraph added explaining Apparent Activation by Component.

10.4.2 Added a requirement prohibiting the active Manager from sending a

RESET_DEVICE Message to the Interface Device of the Clock Sourcing

Component.

10.4.3 Added a requirement prohibiting the active Manager from sending a

RESET_DEVICE Message to the Framer of a Clock Sourcing Component.

10.5 Clarified the requirement for Clock Gear Changes when a function on a Device is not

capable of performing at the new Clock Gear.

10.6.1 Clarified definitions and terms for Message, Guide, and Data Channel.

10.7. Added details on Root Frequency change and on what happens when an active

Framer does not support the requested next Root Frequency.

10.8 Added text before Figure 77 “Changing the Message Channel Characteristics”

explaining the related bus clock for NCo and NCi.

10.9.1 Updated the text to be consistent with Figure 79 “Device Enumeration State

Diagram”.

10.9.1.1 Removed the definition of a predetermined Logical Address.

10.9.1.5 Clarified the requirement for detaching from the bus.

10.11 Added a requirement for the active Manager to use the

CHANGE_ARBITRATION_PRIORITY Message to assign a new Arbitration Priority

code to a Device. Deleted or modified Device requirements for changing Arbitration

Priorities of Messages at runtime.

11.1.2 Minor wording updates.

11.2.3 Minor wording updates.

11.3.2 Added cross-reference to Section 10.12.3 “Atomic Transactions” after “CM field”.

11.4.2 Added a requirement prohibiting the active Manager from sending

NEXT_ACTIVE_FRAMER and NEXT_PAUSE_CLOCK Messages in the same

Reconfiguration Sequence.

Version 1.1 28-Sep-2012 MIPI Alliance Specification for SLIMbus

MIPI Alliance Member Confidential.

NOTICE OF DISCLAIMER 1

The material contained herein is not a license, either expressly or impliedly, to any IPR owned or controlled 2

by any of the authors or developers of this material or MIPI

. The material contained herein is provided on 3

an “AS IS” basis and to the maximum extent permitted by applicable law, this material is provided AS IS 4

AND WITH ALL FAULTS, and the authors and developers of this material and MIPI hereby disclaim all 5

other warranties and conditions, either express, implied or statutory, including, but not limited to, any (if 6

any) implied warranties, duties or conditions of merchantability, of fitness for a particular purpose, of 7

accuracy or completeness of responses, of results, of workmanlike effort, of lack of viruses, and of lack of 8

negligence. 9

All materials contained herein are protected by copyright laws, and may not be reproduced, republished, 10

distributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express 11

prior written permission of MIPI Alliance. MIPI, MIPI Alliance and the dotted rainbow arch and all related 12

trademarks, tradenames, and other intellectual property are the exclusive property of MIPI Alliance and 13

cannot be used without its express prior written permission. 14

ALSO, THERE IS NO WARRANTY OF CONDITION OF TITLE, QUIET ENJOYMENT, QUIET 15

POSSESSION, CORRESPONDENCE TO DESCRIPTION OR NON-INFRINGEMENT WITH REGARD 16

TO THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT. IN NO EVENT WILL ANY 17

AUTHOR OR DEVELOPER OF THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT OR 18

MIPI BE LIABLE TO ANY OTHER PARTY FOR THE COST OF PROCURING SUBSTITUTE 19

GOODS OR SERVICES, LOST PROFITS, LOSS OF USE, LOSS OF DATA, OR ANY INCIDENTAL, 20

CONSEQUENTIAL, DIRECT, INDIRECT, OR SPECIAL DAMAGES WHETHER UNDER 21

CONTRACT, TORT, WARRANTY, OR OTHERWISE, ARISING IN ANY WAY OUT OF THIS OR 22

ANY OTHER AGREEMENT, SPECIFICATION OR DOCUMENT RELATING TO THIS MATERIAL, 23

WHETHER OR NOT SUCH PARTY HAD ADVANCE NOTICE OF THE POSSIBILITY OF SUCH 24

DAMAGES. 25

Without limiting the generality of this Disclaimer stated above, the user of the contents of this Document is 26

further notified that MIPI: (a) does not evaluate, test or verify the accuracy, soundness or credibility of the 27

contents of this Document; (b) does not monitor or enforce compliance with the contents of this Document; 28

and (c) does not certify, test, or in any manner investigate products or services or any claims of compliance 29

with the contents of this Document. The use or implementation of the contents of this Document may 30

involve or require the use of intellectual property rights (“IPR”) including (but not limited to) patents, 31

patent applications, or copyrights owned by one or more parties, whether or not Members of MIPI. MIPI 32

does not make any search or investigation for IPR, nor does MIPI require or request the disclosure of any 33

IPR or claims of IPR as respects the contents of this Document or otherwise. 34

Questions pertaining to this document, or the terms or conditions of its provision, should be addressed to: 35

MIPI Alliance, Inc. 36

c/o IEEE-ISTO 37

445 Hoes Lane 38

Piscataway, NJ 08854 39

Attn: Board Secretary 40

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2019-09-11

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