计算机组成原理英文版答案

所需积分/C币:25 2015-04-06 13:50:26 3.82MB PDF

计算机组成与体系结构英文版答案(第8版),书中部分和中文版不同,请读者注意。
NOTICE This manual contains solutions to the review questions and homework problems in Computer Organization and Architecture, Eighth Edition. If you spot an error in a solution or in the wording of a problem, I would greatly appreciate it if you wouldforwardtheinformationviaemailtows@shore.net An errata sheet for this manual, if needed, is available at http://www.box.net/shared/g4a7bmmtyc.Filenameis S-COA8e-mmyy WS TABLE OF CONTENTS Chapter 1 Introduction..................5 Chapter 2 Computer Evolution and Performance...........6 Chapter 3 Computer Function and Interconnection 14 Chapter 4 Cache Memory ·鲁 …19 Chapter 5 Internal memory Chapter 6 External Memory 38 Chapter 7 Input /Output ························· 43 Chapter 8 Operating System Support .·.·················· 。。着。鲁非。,。自。鲁。非。 50 Chapter 9 Computer arithmetic 57 Chapter 10 Instruction Sets: Characteristics and Functions ................69 Chapter 11 Instruction Sets: Addressing Modes and Formats..80 Chapter 12 Processor Structure and Function.......85 Chapter 13 Reduced Instruction Set Computers 92 Chapter 14 Instruction- Level Parallelism and Superscalar Processors 97 Chapter 15 Control Unit Operation..........103 Chapter 16 Microprogrammed Control...........106 Chapter17 Parallel processing…… ·······:············ .10 Chapter 18 Multicore Computers 118 Chapter 19 Number Systems........... 121 Chapter 20 Digital Logic 122 Chapter 21 The IA-64 Architecture...........126 Appendix b assembly Language and Related Topics 130 CHAPTER 1 INTRODUCTION ANSW国R8了QUST@N 1.1 Computer architecture refers to those attributes of a system visible to a programmer or, put another way, those attributes that have a direct impact on the logical execution of a program. Computer organization refers to the operationa units and their interconnections that realize the architectural specifications Examples of architectural attributes include the instruction set, the number of bits used to represent various data types(e. g numbers, characters),I/O mechanisms and techniques for addressing memory. Organizational attributes include those hardware details transparent to the programmer, such as control signals interfaces between the computer and peripherals; and the memory technology used 1.2 Computer structure refers to the way in which the components of a computer are interrelated Computer function refers to the operation of each individual component as part of the structure 1.3 Data processing, data storage; data movement; and control 1.4 Central processing unit(CPU): Controls the operation of the computer and performs its data processing functions; often simply referred to as processor Main memory: Stores data I/O: Moves data between the computer and its external environment System interconnection: Some mechanism that provides for communication among CPu, main memory and I/O. a common example of system interconnection is by mcans of a system bus, consisting of a number of conducting wires to which all the other components attach 1.5 Control unit: Controls the operation of the cpu and hence the computer Arithmetic and logic unit(ALU): Performs the computer's data processing functions Registers: Provides storage internal to the CPu CPU interconnection: Some mechanism that provides for communication among the control unit, ALU, and registers CHAPTER 2 COMPUTER EVOLUTION AND PERFORMANCE ANSWER8 TO QUESTION感 2.1 In a stored program computer, programs are represented in a form suitable for storing in memory alongside the data. The computer gets its instructions by reading them from memory, and a program can be set or altered by setting the values of a ortion of memory 2.2 A main memory which stores both data and instructions: an arithmetic and logic unit(ALU)capable of operating on binary data; a control unit, which interprets the instructions in memory and causes them to be executed and input and output I/O)equipment operated by the control unit 2.3 Gates, memory cells, and interconnections among gates and memory cells 2.4 Moore observed that the number of transistors that could be put on a single chip was doubling every year and correctly predicted that this pace would continue into the near future. 2.5 Similar or identical instruction set: In many cases, the same set of machine instructions is supported on all members of the family. Thus, a program that executes on one machine will also execute on any other Similar or identical operating system: The same basic operating system is available for all family members. Increasing speed: The rate of instruction execution increases in going from lower to higher family members. Increasing Number of I/o ports: In going rom lower to higher family members. Increasing memory size: In going from lower to higher family members. Increasing cost: In going from lower to higher family members 2.6 In a microprocessor, all of the components of the CPU are on a single chip AANSWERS T⑥同R感LMS 2.1 This program is developed in HAYE98 The vectors A, B, and c are each stored in 1,000 contiguous locations in memory, beginning at locations 1001, 2001, and the vectors are processed from high location to low location Location instruction Comments 0 999 Constant(count n) Constant 1000 Constant GL LOAD M(2000) Transfer A(to AC 3R ADDM(3000) Compute A(I)+B(①) 4L STOR M(4000 Transfer sum to C() 4R LOAD M(O) Load count n 5L SUB M1 Decrement n by 1 5R JUMP+M(6,20:39) Test N and branch to 6R if nonnegative 6L JUMP M(6,0:19) Halt 6R STOR M(O Update n L ADD M(1) Increment Ac by 1 7R ADD M(2) 8L STOR M(3,8:19) Modify address in 3L 8R ADD M(2) 9L STOR M(3,28:39) Modify address in 3R 9R ADD M(2) 10L STOR M(4,8:19) Modify address in 4L 10R JUMP N(3,0:19) Branch to 3L 22a Opcode Operand 0000000100000000 b. First, the CPu must make access memory to fetch the instruction. The instruction contains the address of the data we want to load. During the execute phase accesses memory to load the data value located at that address for a total of two trips to memory. 2.3 To read a value from memory, the Cpu puts the address of the value it wants into the MaR. the cpu then asserts the read control line to memory and places the address on the address bus Memory places the contents of the memory location passed on the data bus. This data is then transferred to the MBr To write a value to memory the cpu puts the address of the value it wants to write into the Mar The CPu also places the data it wants to write into the mbr. the cpu then asserts the Write control line to memory and places the address on the address bus and the data on the data bus. memory transfers the data on the data bus into the corresponding memory location 7- 2.4 Address Contents 08A LOAD M(OFA) STOR M(OFB 08B LOAD M(OFA JUMP +M(O8D 08C LOAD-MOFA) STOR M(OFB 08D This program will store the absolute value of content at memory location OFA into memory location OFB 2.5 All data paths to/ from MBR are 40 bits. All data paths to/ from MAR are 12 bits Paths to/ from AC are 40 bits Paths to/from MQ are 40 bits 2.6 The purpose is to increase performance. When an address is presented to a memory module, there is some time delay before the read or write operation can be performed. While this is happening an address can be presented to the other module. For a series of requests for successive words, the maximum rate is doubled 2.7 The discrepancy can be explained by noting that other system components aside from clock speed make a big difference in overall system speed. In particular, memory systems and advances in I/o processing contribute to the performance ratio. a system is only as fast as its slowest link. In recent years the bottlenecks have been the performance of memor modules and bus speed. 2.8 As noted in the answer to Problem 2.7, even though the Intel machine may have a faster clock speed(2.4 GHz vS. 1.2 GHz), that does not necessarily mean the system will perform faster. Different systems are not comparable on clock speed. Other factors such as the system components (memory buses architecture)and the instruction sets must also be taken into account a more accurate measure is to run both systems on a benchmark Benchmark programs exist for certain tasks, such as running office applications, performing floating-point operations, graphics operations, and so on. The systems can be compared to each other on how long they take to complete these tasks. According to Apple Computer, the g4 is comparable or better than a higher-clock speed Pentium on many benchmarks 2.9 This representation is wasteful because to represent a single decimal digit from 0 through 9 we need to have ten tubes. If we could have an arbitrary number of these tubes on at the same time, then those same tubes could be treated as binary bits. With ten bits, we can represent 210 patterns or 1024 patterns For integers these patterns could be used to represent the numbers from 0 through 1023 2.10 CPI=1.55; MIPS rate= 25.8; Execution time=3.87 ns. Source: HWAN93 2.11a CPIA ∑CPx1(8×1+4×3+2x4+4x3)×10 ≈2.22 8+4+2+4)×10 200×10 MIPS CPI4×10 222x106÷90 CPU.-1×CP4-18×10×22 0.2S 200×10 CP ∑CP1×1(0×1+8×2+2x4+4×3)×10 ≈1.92 (10+8+2+4)×10 200×10 MIPS CPI 104 100192×10 CPU 1×CPlB_24×10°×192 =0.23s 200×10 b.Although machine B has a higher MIPS than machine A, it requires a longer CPU time to execute the same set of benchmark programs 2.12 a. We can express the MIPs rate as: [(MIPS rate)/10]=I/T So that I,=TxI(MIPS ratc)/100. The ratio of the instruction count of the Rs /6000 to the vax is x×18]/[12X×11.5 b. For the Vax, CPi-(5 MHz)/(1 MIPS)=5 For the rs/6000,CP1=25/18=139 2.13 From Equation (2.2), MIPS=I/(T x 106)=100/T The MIPS values are Computer A Computer B Computer C Program 1 100 Program 2 0.1 Program 3 0.2 0.1 5521 Program 4 0.125 Arithmetic Rank Harmonic Rank mean mean Computer a 25.325 0.25 2 Computer b 2.8 3 0.21 3 Computer c 3.26 2 2.1 2.14 a. Normalized to r: Processor Benchmark R E 1.71 3.11 F 1.19 1.19 H 1.00 0.43 0.49 0.60 K 1.00 2.10 2.09 arithmetic 1.00 1.31 1.50 mean b Normalized to m: Processor Benchmark R M Z E 0.59 1.00 1.82 F 0.84 1.00 100 H 2.32 1.13 0.90 1.00 0.54 K 0.48 1.00 Arithmetic 1.00 1.10 mean C. Recall that the larger the ratio, the higher the speed. Based on(a)r is the slowest machine, by a significant amount Based on( b), M is the slowest machine, by a modest amount d. normalized to r Processor Benchmark R M Z E 1.00 1.71 3. F 1.1 1.19 H 1.00 0.43 0.49 1.11 0.60 K 1.00 2.10 2.0 Geometric 1.15 1.18 mean

...展开详情
img
Crystallio

关注 私信 TA的资源

上传资源赚积分,得勋章
相关内容推荐