Release 14.7 - par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Thu Oct 29 10:43:20 2015
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors.
2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information.
3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator.
INPUT FILE: ov7670_vga_map.ncd
OUTPUT FILE: ov7670_vga_pad.txt
PART TYPE: xc6slx16
SPEED GRADE: -2
PACKAGE: csg324
Pinout by Pin Number:
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|Pin Number|Signal Name |Pin Usage|Pin Name |Direction|IO Standard |IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage|Constraint|IO Register|Signal Integrity|
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|A1 | | |GND | | | | | | | | | | | |
|A2 | |IOBS |IO_L2N_0 |UNUSED | |0 | | | | | | | | |
|A3 | |IOBS |IO_L4N_0 |UNUSED | |0 | | | | | | | | |
|A4 | |IOBS |IO_L5N_0 |UNUSED | |0 | | | | | | | | |
|A5 | |IOBS |IO_L6N_0 |UNUSED | |0 | | | | | | | | |
|A6 | |IOBS |IO_L8N_VREF_0 |UNUSED | |0 | | | | | | | | |
|A7 | |IOBS |IO_L10N_0 |UNUSED | |0 | | | | | | | | |
|A8 | |IOBS |IO_L33N_0 |UNUSED | |0 | | | | | | | | |
|A9 | |IOBS |IO_L35N_GCLK16_0 |UNUSED | |0 | | | | | | | | |
|A10 | |IOBS |IO_L37N_GCLK12_0 |UNUSED | |0 | | | | | | | | |
|A11 | |IOBS |IO_L39N_0 |UNUSED | |0 | | | | | | | | |
|A12 |vga_g<2> |IOB |IO_L41N_0 |OUTPUT |LVCMOS33 |0 |12 |SLOW | | | |LOCATED |NO |NONE |
|A13 |vga_g<3> |IOB |IO_L50N_0 |OUTPUT |LVCMOS33 |0 |12 |SLOW | | | |LOCATED |NO |NONE |
|A14 |vga_g<5> |IOB |IO_L62N_VREF_0 |OUTPUT |LVCMOS33 |0 |12 |SLOW | | | |LOCATED |NO |NONE |
|A15 |vga_g<1> |IOB |IO_L64N_SCP4_0 |OUTPUT |LVCMOS33 |0 |12 |SLOW | | | |LOCATED |NO |NONE |
|A16 |vga_b<1> |IOB |IO_L66N_SCP0_0 |OUTPUT |LVCMOS33 |0 |12 |SLOW | | | |LOCATED |NO |NONE |
|A17 | | |TCK | | | | | | | | | | | |
|A18 | | |GND | | | | | | | | | | | |
|B1 | | |VCCAUX | | | | | | | |3.3 | | | |
|B2 | |IOBM |IO_L2P_0 |UNUSED | |0 | | | | | | | | |
|B3 | |IOBM |IO_L4P_0 |UNUSED | |0 | | | | | | | | |
|B4 | |IOBM |IO_L5P_0 |UNUSED | |0 | | | | | | | | |
|B5 | | |VCCO_0 | | |0 | | | | |3.30 | | | |
|B6 | |IOBM |IO_L8P_0 |UNUSED | |0 | | | | | | | | |
|B7 | | |GND | | | | | | | | | | | |
|B8 | |IOBM |IO_L33P_0 |UNUSED | |0 | | | | | | | | |
|B9 | |IOBM |IO_L35P_GCLK17_0 |UNUSED | |0 | | | | | | | | |
|B10 | | |VCCO_0 | | |0 | | | | |3.30 | | | |
|B11 | |IOBM |IO_L39P_0 |UNUSED | |0 | | | | | | | | |
|B12 | |IOBM |IO_L41P_0 |UNUSED | |0 | | | | | | | | |
|B13 | | |GND | | | | | | | | | | | |
|B14 |vga_b<0> |IOB |IO_L62P_0 |OUTPUT |LVCMOS33 |0 |12 |SLOW | | | |LOCATED |NO |NONE |
|B15 | | |VCCO_0 |
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XILINX FPGA SPARTAN6 OV7670摄像头GVA显示实验 VERILOG逻辑例程源码 ISE14.7工程文件
共91个文件
v:18个
xmsgs:8个
html:7个
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XILINX FPGA SPARTAN6 OV7670摄像头GVA显示实验 VERILOG逻辑例程源码 ISE14.7工程文件 module vga_disp( input vga_clk, input vga_rst, input [63:0] ddr_data_vga, //DDR中的图像数据 output vga_hsync, output vga_vsync, output [4:0] vga_r, output [5:0] vga_g, output [4:0] vga_b, output reg [10 : 0] x_cnt, output reg [9 : 0] y_cnt, output reg ddr_addr_rd_set, //ddr读地址复位信号 output reg ddr_rd_cmd, output reg ddr_rden ); /
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XILINX FPGA SPARTAN6 OV7670摄像头GVA显示实验 VERILOG逻辑例程源码 ISE14.7工程文件.rar (91个子文件)
ov7670_vga
xst
projnav.tmp
dump.xst
ov7670_vga.prj
work
work.sdbl 933KB
work.sdbx 411B
ov7670_vga_map.map 20KB
ov7670_vga.drc 778B
chipscope_icon.ngc 31KB
ov7670_vga.ut 553B
ov7670_vga_summary.html 19KB
ov7670_vga.ngd 2.54MB
ov7670_vga.unroutes 161B
iseconfig
ov7670_vga.xreport 20KB
ov7670_vga.projectmgr 7KB
mig_39_2.xreport 20KB
ov7670_vga_map.ncd 496KB
ddr_rw_summary.html 4KB
ov7670_vga_pad.txt 66KB
ov7670_vga.twx 181KB
ov7670_vga_xst.xrpt 20KB
ov7670_vga.ncd 947KB
ov7670_vga.cpj 147KB
ov7670_vga.pad 17KB
ov7670_vg.gise 1KB
_xmsgs
bitgen.xmsgs 1KB
xst.xmsgs 381KB
trce.xmsgs 1KB
pn_parser.xmsgs 773B
ngdbuild.xmsgs 11KB
map.xmsgs 7KB
par.xmsgs 943B
ov7670_vga.bgn 7KB
ov7670_vga.xpi 45B
chipscope_ila.v 946B
mig_39_2.ucf 14KB
ov7670_vga_guide.ncd 947KB
ov7670_vga.prj 843B
ov7670_vga_par.xrpt 200KB
usage_statistics_webtalk.html 317KB
ov7670_vga_pad.csv 17KB
ov7670_lcd_summary.html 4KB
ov7670_vga.pcf 116KB
mig_39_2_summary.html 3KB
ipcore_dir
coregen.log 101B
_xmsgs
cg.xmsgs 445B
tmp
_cg
_dbg
xil_696.out 150B
xil_696.in 2KB
create_ram.tcl 1KB
ov7670_vga_bitgen.xwbt 284B
rtl
reg_config.v 9KB
ddr_rw.v 16KB
ov7670_vga.v 7KB
i2c_com.v 3KB
frame_switch.v 3KB
vga_disp.v 7KB
chipscope_ila.ngc 898KB
ov7670_vga.ngc 876KB
ov7670_vga_map.xrpt 58KB
_ngo
netlist.lst 227B
ov7670_vga.ptwx 22KB
ov7670_vga.bit 454KB
ov7670_vga_map.mrp 58KB
ov7670_vga.xise 44KB
ov7670_vga.ngr 935KB
ov7670_vga.bld 6KB
ov7670_vga_usage.xml 204KB
par_usage_statistics.html 4KB
ov7670_vga_map.ngm 4.86MB
ov7670_vga.stx 0B
ov7670_vga_envsettings.html 17KB
webtalk_pn.xml 3KB
camera_capture.v 3KB
ov7670_vga.twr 155KB
ov7670_vga.syr 408KB
coregen.cgc 67KB
ov7670_vga.par 22KB
ov7670_vga.xst 1KB
ov7670_vga.gise 13KB
webtalk.log 738B
ov7670_vga_ngdbuild.xrpt 20KB
xlnx_auto_0_xdb
cst.xbcd 30KB
ov7670_vga.cmd_log 83KB
ov7670_vga_summary.xml 410B
chipscope_icon.v 892B
remote_sources
_
rtl
mcb_controller
mcb_raw_wrapper.v 262KB
mcb_soft_calibration.v 67KB
iodrp_mcb_controller.v 15KB
mcb_soft_calibration_top.v 13KB
iodrp_controller.v 11KB
mcb_ui_top.v 111KB
infrastructure.v 12KB
memc_wrapper.v 65KB
mig_39_2.v 40KB
synth
mig_39_2.lso 6B
共 91 条
- 1
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