+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Legal Partition Candidates ;
+-----------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
+-----------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; ram_double_inst|altsyncram_component|auto_generated ; 26 ; 0 ; 0 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; ram_double_inst ; 26 ; 0 ; 0 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; key_filter_inst0 ; 3 ; 0 ; 0 ; 0 ; 2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; uart_rx_inst0 ; 6 ; 3 ; 0 ; 3 ; 9 ; 3 ; 3 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; uart_byte_tx_inst0 ; 14 ; 3 ; 0 ; 3 ; 2 ; 3 ; 3 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; tx_rx_ram_ctrl_inst_0 ; 6 ; 0 ; 0 ; 0 ; 18 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+-----------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
RS232串口收发与RAM读写，借鉴小梅哥的思路 （218个子文件） 
_info 4KB _vmake 26B ram_tx_rx.vpr.ammdb 848B ram_tx_rx.root_partition.cmp.ammdb 839B ram_tx_rx.map.ammdb 133B tx_rx_ram_ctrl.v.bak 3KB ram_ctrl_top.v.bak 3KB ram_control_tb.v.bak 3KB ram_control_top.v.bak 3KB ram_tx_rx_run_msim_rtl_verilog.do.bak 1KB key_model.v.bak 786B ram_tx_rx_run_msim_rtl_verilog.do.bak1 1KB ram_tx_rx_run_msim_rtl_verilog.do.bak2 1KB ram_tx_rx_run_msim_rtl_verilog.do.bak3 1KB ram_tx_rx_run_msim_rtl_verilog.do.bak4 1KB ram_tx_rx.cmp.bpm 641B ram_tx_rx.map.bpm 600B issp.bsf 2KB issp.bsf 2KB ram_tx_rx.cmp.cdb 51KB ram_tx_rx.rtlv_sg.cdb 26KB ram_tx_rx.root_partition.cmp.cdb 22KB ram_tx_rx.map.cdb 19KB ram_tx_rx.root_partition.map.cdb 19KB ram_tx_rx.(3).cnf.cdb 12KB ram_tx_rx.(2).cnf.cdb 6KB ram_tx_rx.(4).cnf.cdb 5KB ram_tx_rx.(1).cnf.cdb 3KB ram_tx_rx.rtlv_sg_swap.cdb 3KB ram_tx_rx.(0).cnf.cdb 3KB ram_tx_rx.(7).cnf.cdb 2KB ram_tx_rx.(5).cnf.cdb 2KB ram_tx_rx.map_bb.cdb 2KB ram_tx_rx.(6).cnf.cdb 2KB ram_tx_rx.root_partition.map.hbdb.cdb 2KB ram_tx_rx.root_partition.map.reg_db.cdb 762B issp.cmp 130B _primary.dat 5KB _primary.dat 2KB _primary.dat 2KB _primary.dat 2KB _primary.dat 2KB _primary.dat 1KB _primary.dat 1KB _primary.dat 546B ram_tx_rx.db_info 144B ram_tx_rx.db_info 144B _primary.dbs 4KB _primary.dbs 3KB _primary.dbs 2KB _primary.dbs 2KB _primary.dbs 2KB _primary.dbs 2KB _primary.dbs 1KB _primary.dbs 686B ram_tx_rx.tiscmp.slow_1200mv_85c.ddb 182KB ram_tx_rx.tiscmp.slow_1200mv_0c.ddb 182KB ram_tx_rx.tiscmp.fast_1200mv_0c.ddb 179KB ram_tx_rx.tiscmp.fastest_slow_1200mv_0c.ddb 119KB ram_tx_rx.tiscmp.fastest_slow_1200mv_85c.ddb 119KB ram_tx_rx.asm_labs.ddb 10KB ram_tx_rx.tis_db_list.ddb 306B issp.debuginfo 9KB issp.debuginfo 9KB ram_tx_rx.root_partition.cmp.dfp 33B ram_tx_rx_run_msim_rtl_verilog.do 1KB ram_tx_rx.done 26B ram_tx_rx.root_partition.map.dpi 2KB ram_tx_rx.root_partition.map.hbdb.hb_info 46B ram_tx_rx.pre_map.hdb 23KB ram_tx_rx.cmp.hdb 23KB ram_tx_rx.rrp.hdb 23KB ram_tx_rx.root_partition.cmp.hdb 23KB ram_tx_rx.rtlv.hdb 22KB ram_tx_rx.map.hdb 22KB ram_tx_rx.root_partition.map.hdb 22KB ram_tx_rx.root_partition.map.hbdb.hdb 21KB ram_tx_rx.map_bb.hdb 13KB ram_tx_rx.(3).cnf.hdb 2KB ram_tx_rx.(2).cnf.hdb 2KB ram_tx_rx.(0).cnf.hdb 1KB ram_tx_rx.(1).cnf.hdb 1KB ram_tx_rx.(4).cnf.hdb 1KB ram_tx_rx.(5).cnf.hdb 1KB ram_tx_rx.(6).cnf.hdb 835B ram_tx_rx.(7).cnf.hdb 793B ram_tx_rx.hier_info 23KB ram_tx_rx.hif 2KB ram_tx_rx.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd 729KB ram_tx_rx.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd 727KB ram_tx_rx.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd 723KB
issp.html 7KB issp__report.html 7KB ram_tx_rx.lpc.html 2KB ram_tx_rx.cmp.idb 3KB modelsim.ini 11KB ram_tx_rx.jdi 228B ram_tx_rx_partition_pins.json 397B ram_tx_rx.root_partition.map.kpt 5KB ram_tx_rx.map.kpt 5KB共 218 条
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