+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Legal Partition Candidates ;
+----------------------------------------------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
+----------------------------------------------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; inst_filter_3x3|inst_line_shift_ram|ALTSHIFT_TAPS_component|auto_generated|cntr1|cmpr4 ; 20 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; inst_filter_3x3|inst_line_shift_ram|ALTSHIFT_TAPS_component|auto_generated|cntr1 ; 2 ; 0 ; 0 ; 0 ; 10 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; inst_filter_3x3|inst_line_shift_ram|ALTSHIFT_TAPS_component|auto_generated|altsyncram2 ; 39 ; 1 ; 0 ; 1 ; 16 ; 1 ; 1 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; inst_filter_3x3|inst_line_shift_ram|ALTSHIFT_TAPS_component|auto_generated ; 10 ; 0 ; 0 ; 0 ; 24 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; inst_filter_3x3|inst_line_shift_ram ; 10 ; 0 ; 0 ; 0 ; 16 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; inst_filter_3x3 ; 11 ; 0 ; 0 ; 0 ; 73 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter|u7 ; 26 ; 0 ; 0 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter|u6 ; 26 ; 0 ; 0 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter|u5 ; 26 ; 0 ; 0 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter|u4 ; 26 ; 0 ; 0 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter|u3 ; 26 ; 0 ; 0 ; 0 ; 24 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter|u2 ; 26 ; 0 ; 0 ; 0 ; 24 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter|u1 ; 26 ; 0 ; 0 ; 0 ; 24 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; u_median_filter ; 75 ; 0 ; 0 ; 0 ; 9 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+----------------------------------------------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
FPGA实现中值滤波并modelsim仿真 （120个子文件） 
_info 4KB _vmake 29B median_filter.v.bak 5KB median_filter_top_tb.v.bak 2KB mean_filter_top_tb.v.bak 2KB median_filter.v.bak 2KB mean_filter_top_run_msim_rtl_verilog.do.bak 1KB median_filter_top.v.bak 1KB sort.v.bak 1KB mean_filter_top_run_msim_rtl_verilog.do.bak1 1KB mean_filter_top_run_msim_rtl_verilog.do.bak10 1KB mean_filter_top_run_msim_rtl_verilog.do.bak11 1KB mean_filter_top_run_msim_rtl_verilog.do.bak2 1KB mean_filter_top_run_msim_rtl_verilog.do.bak3 1KB mean_filter_top_run_msim_rtl_verilog.do.bak4 1KB mean_filter_top_run_msim_rtl_verilog.do.bak5 1KB mean_filter_top_run_msim_rtl_verilog.do.bak6 1KB mean_filter_top_run_msim_rtl_verilog.do.bak7 1KB mean_filter_top_run_msim_rtl_verilog.do.bak8 1KB mean_filter_top_run_msim_rtl_verilog.do.bak9 1KB
flower.bmp 900KB 中值滤波.bmp 301KB 含椒盐噪声的灰度图.bmp 301KB 1.bmp 301KB 2.bmp 301KB mean_filter_top.pre_map.cdb 33KB mean_filter_top.rtlv_sg.cdb 24KB mean_filter_top.(3).cnf.cdb 6KB mean_filter_top.(1).cnf.cdb 5KB mean_filter_top.(12).cnf.cdb 5KB mean_filter_top.(7).cnf.cdb 5KB mean_filter_top.(2).cnf.cdb 4KB mean_filter_top.rtlv_sg_swap.cdb 4KB mean_filter_top.(11).cnf.cdb 3KB mean_filter_top.(6).cnf.cdb 3KB mean_filter_top.(0).cnf.cdb 2KB mean_filter_top.(14).cnf.cdb 2KB mean_filter_top.(10).cnf.cdb 2KB mean_filter_top.(5).cnf.cdb 2KB mean_filter_top.(4).cnf.cdb 1KB mean_filter_top.(9).cnf.cdb 1KB mean_filter_top.(13).cnf.cdb 1KB mean_filter_top.(8).cnf.cdb 1KB mean_filter_top.rrs.cdb 276B mean_filter_top.db_info 144B mean_filter_top.db_info 144B mean_filter_top_run_msim_rtl_verilog.do 1KB mean_filter_top.done 26B mean_filter_top.ae.hdb 24KB mean_filter_top.pre_map.hdb 24KB mean_filter_top.rtlv.hdb 24KB mean_filter_top.(3).cnf.hdb 2KB mean_filter_top.(1).cnf.hdb 2KB mean_filter_top.(0).cnf.hdb 1KB mean_filter_top.(2).cnf.hdb 1KB mean_filter_top.(12).cnf.hdb 1KB mean_filter_top.(7).cnf.hdb 1KB mean_filter_top.(14).cnf.hdb 1KB mean_filter_top.(11).cnf.hdb 901B mean_filter_top.(6).cnf.hdb 896B mean_filter_top.(13).cnf.hdb 777B mean_filter_top.(8).cnf.hdb 766B mean_filter_top.(5).cnf.hdb 590B mean_filter_top.(10).cnf.hdb 584B mean_filter_top.(9).cnf.hdb 573B mean_filter_top.(4).cnf.hdb 572B mean_filter_top.hier_info 79KB mean_filter_top.hif 2KB
mean_filter_top.lpc.html 4KB modelsim.ini 11KB Median_img.m 2KB msim_transcript 6KB mean_filter_top.sgate.nvd 46KB mean_filter_top.sgate_sm.nvd 252B _lib.qdb 48KB _lib1_0.qdb 32KB line_shift_ram.qip 477B prev_cmp_mean_filter_top.qmsg 24KB mean_filter_top.map.qmsg 17KB prev_cmp_median_filter_top.qmsg 17KB mean_filter_top.npp.qmsg 3KB median_filter_top.qpf 1KB _lib1_0.qpg 72KB mean_filter_top.qsf 4KB _lib1_0.qtl 46KB mean_filter_top.qws 2KB mean_filter_top.cmp.rdb 5KB mean_filter_top.map.rdb 1KB mean_filter_top.lpc.rdb 731B README 653B mean_filter_top.map.rpt 30KB mean_filter_top.flow.rpt 9KB mean_filter_top_nativelink_simulation.rpt 1KB mean_filter_top.sld_design_entry.sci 227B mean_filter_top.sld_design_entry_dsc.sci 227B mean_filter_top.map.summary 563B altsyncram_hvg1.tdf 21KB altsyncram_bsg1.tdf 21KB cntr_lmf.tdf 5KB cntr_2lf.tdf 5KB共 120 条
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