s3c2440上的bootloader移植代码

/* dm9ks.c: Version 2.03 2005/10/17 A Davicom DM9000A/DM9010 ISA NIC fast Ethernet driver for Linux. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. (C)Copyright 1997-2005 DAVICOM Semiconductor,Inc. All Rights Reserved. V1.00 10/13/2004 Add new function Early transmit & IP/TCP/UDP Checksum offload enable & flow control is default V1.1 12/29/2004 Add Two packet mode & modify RX function V1.2 01/14/2005 Add Early transmit mode V1.3 03/02/2005 Support kernel 2.6 v1.33 06/08/2005 #define DM9KS_MDRAL 0xf4 #define DM9KS_MDRAH 0xf5 V2.00 Spenser - 01/10/2005 - Modification for PXA270 MAINSTONE. - Modified dmfe_tx_done(). - Add dmfe_timeout(). V2.01 10/07/2005 Modified dmfe_timer() Dected network speed 10/100M V2.02 10/12/2005 Use link change to chage db->Speed dmfe_open() wait for Link OK V2.03 11/22/2005 Power-off and Power-on PHY in dmfe_init() support IOL */ #if defined(MODVERSIONS) #include <linux/modversions.h> #endif #include <linux/config.h> #include <linux/init.h> #include <linux/delay.h> #include <linux/module.h> #include <linux/ioport.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/skbuff.h> #include <linux/version.h> #include <asm/dma.h> #include <linux/spinlock.h> //#include <linux/crc32.h> //tj1205 #include <asm/io.h> #include <asm/irq.h> /* Board/System/Debug information/definition ---------------- */ #define DM9KS_ID 0x90000A46 #define DM9010_ID 0x90100A46 /*-------register name-----------------------*/ #define DM9KS_NCR 0x00 /* Network control Reg.*/ #define DM9KS_NSR 0x01 /* Network Status Reg.*/ #define DM9KS_TCR 0x02 /* TX control Reg.*/ #define DM9KS_RXCR 0x05 /* RX control Reg.*/ #define DM9KS_BPTR 0x08 #define DM9KS_EPCR 0x0b #define DM9KS_EPAR 0x0c #define DM9KS_EPDRL 0x0d #define DM9KS_EPDRH 0x0e #define DM9KS_GPR 0x1f /* General purpose register */ #define DM9KS_TCR2 0x2d #define DM9KS_SMCR 0x2f /* Special Mode Control Reg.*/ #define DM9KS_ETXCSR 0x30 /* Early Transmit control/status Reg.*/ #define DM9KS_TCCR 0x31 /* Checksum cntrol Reg. */ #define DM9KS_RCSR 0x32 /* Receive Checksum status Reg.*/ #define DM9KS_MRCMDX 0xf0 #define DM9KS_MRCMD 0xf2 #define DM9KS_MDRAL 0xf4 #define DM9KS_MDRAH 0xf5 #define DM9KS_MWCMD 0xf8 #define DM9KS_TXPLL 0xfc #define DM9KS_TXPLH 0xfd #define DM9KS_ISR 0xfe #define DM9KS_IMR 0xff /*---------------------------------------------*/ #define DM9KS_REG05 0x30 /* SKIP_CRC/SKIP_LONG */ #define DM9KS_REGFF 0xA3 /* IMR */ #define DM9KS_DISINTR 0x80 #define DM9KS_PHY 0x40 /* PHY address 0x01 */ #define DM9KS_PKT_RDY 0x01 /* Packet ready to receive */ #define DM9KS_MIN_IO 0xd0000000 //tj1204 0xd0000000 #define DM9KS_MAX_IO 0xd0000370 #define DM9K_IRQ IRQ_CS8900 #define DM9KS_VID_L 0x28 #define DM9KS_VID_H 0x29 #define DM9KS_PID_L 0x2A #define DM9KS_PID_H 0x2B #define DM9KS_RX_INTR 0x01 #define DM9KS_TX_INTR 0x02 #define DM9KS_LINK_INTR 0x20 #define DM9KS_DWORD_MODE 1 #define DM9KS_BYTE_MODE 2 #define DM9KS_WORD_MODE 0 #define TRUE 1 #define FALSE 0 /* Number of continuous Rx packets */ #define CONT_RX_PKT_CNT 10 #define DMFE_TIMER_WUT jiffies+(HZ*5) /* timer wakeup time : 5 second */ #if defined(DM9KS_DEBUG) #define DMFE_DBUG(dbug_now, msg, vaule)\ if (dmfe_debug||dbug_now) printk(KERN_ERR "dmfe: %s %x\n", msg, vaule) #else #define DMFE_DBUG(dbug_now, msg, vaule)\ if (dbug_now) printk(KERN_ERR "dmfe: %s %x\n", msg, vaule) #endif #undef inb #undef outb #undef inw #undef outw #undef inl #undef outl typedef struct _RX_DESC { u8 rxbyte; u8 status; u16 length; }RX_DESC; typedef union{ u8 buf[4]; RX_DESC desc; } rx_t; enum DM9KS_PHY_mode { DM9KS_10MHD = 0, DM9KS_100MHD = 1, DM9KS_10MFD = 4, DM9KS_100MFD = 5, DM9KS_AUTO = 8, }; /* Structure/enum declaration ------------------------------- */ typedef struct board_info { u32 reset_counter; /* counter: RESET */ u32 reset_tx_timeout; /* RESET caused by TX Timeout */ u32 io_addr; /* Register I/O base address */ u32 io_data; /* Data I/O address */ int tx_pkt_cnt; u8 op_mode; /* PHY operation mode */ u8 io_mode; /* 0:word, 2:byte */ u8 device_wait_reset; /* device state */ u8 Speed; /* current speed */ int cont_rx_pkt_cnt;/* current number of continuos rx packets */ struct timer_list timer; struct net_device_stats stats; unsigned char srom[128]; spinlock_t lock; } board_info_t; /* Global variable declaration ----------------------------- */ /*static int dmfe_debug = 0;*/ static struct net_device * dmfe_dev = NULL; /* For module input parameter */ static int mode = DM9KS_AUTO; static int media_mode = DM9KS_AUTO; static u8 irq = DM9K_IRQ; static u32 iobase = DM9KS_MIN_IO; static u32 lanBase = DM9KS_MIN_IO; /* function declaration ------------------------------------- */ int dmfe_probe(struct net_device *); static int dmfe_open(struct net_device *); static int dmfe_start_xmit(struct sk_buff *, struct net_device *); static void dmfe_tx_done(unsigned long); static void dmfe_packet_receive(struct net_device *); static int dmfe_stop(struct net_device *); static struct net_device_stats * dmfe_get_stats(struct net_device *); static int dmfe_do_ioctl(struct net_device *, struct ifreq *, int); static void dmfe_interrupt(int , void *, struct pt_regs *); static void dmfe_timer(unsigned long); static void dmfe_init_dm9000(struct net_device *); static unsigned long cal_CRC(unsigned char *, unsigned int, u8); static u8 ior(board_info_t *, int); static void iow(board_info_t *, int, u8); static u16 phy_read(board_info_t *, int); static void phy_write(board_info_t *, int, u16); static u16 read_srom_word(board_info_t *, int); static void dm9000_hash_table(struct net_device *); static void dmfe_timeout(struct net_device *); static void dmfe_reset(struct net_device *); #if defined(CHECKSUM) static u8 check_rx_ready(u8); #endif /* DM9000 network baord routine ---------------------------- */ static u8 inb(u16 addr); static void outb(u8 value, u16 addr); static u16 inw(u16 addr); static void outw(u16 value, u16 addr); static u32 inl(u16 addr); static void outl(u32 value, u16 addr); static u8 inb(volatile u16 addr) { return(*(volatile u8 *)(lanBase+addr)); } static void outb(volatile u8 value, volatile u16 addr) { *(volatile u8 *)(lanBase+addr) = value; } static u16 inw(volatile u16 addr) { return(*(volatile u16 *)(lanBase+addr)); } static void outw(volatile u16 value, volatile u16 addr) { *(volatile u16 *)(lanBase+addr) = value; } static u32 inl(volatile u16 addr) { return(*(volatile u32 *)(lanBase+addr)); } static void outl(volatile u32 value, volatile u16 addr) { *(volatile u32 *)(lanBase+addr) = value; } /* Search DM9000 board, allocate space and register it */ struct net_device * __init dmfe_probe1(void) { struct net_device *dev; int err; dev = init_etherdev(NULL, sizeof(struct board_info)); ether_setup(dev); if(!dev) return ERR_PTR(-ENOMEM); SET_MODULE_OWNER(dev); err = dmfe_probe(dev); if (err) goto out; return dev; out1: release_region(dev->base_addr,2); out: return ERR_PTR(err); } int __init dmfe_probe(struct net_device *dev) { struct board_info *db; /* Point a board information structure */ u32 id_val; u16 i, cmd_select,dm9000_found = FALSE; BWSCON = (BWSCON & ~(BWSCON_ST3 | BWSCON_WS3 | BWSCON_DW3)) | (BWSCON_ST3 | BWSCON_WS3 | BWSCON_DW(