没有合适的资源?快使用搜索试试~ 我知道了~
C51学习资料书籍pdf格式
需积分: 50 13 下载量 163 浏览量
2008-10-24
13:47:19
上传
评论
收藏 1.73MB PDF 举报
温馨提示
试读
116页
51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍51学习书籍
资源推荐
资源详情
资源评论
Atmel 8051 Microcontrollers
Hardware Manual
Atmel 8051 Microcontrollers Hardware Manual 1
4316E–8051–01/07
Table of Contents
Section 1
The 8051 Instruction Set....................................................................... 1-2
1.1 Program Status Word................................................................................1-2
1.2 Addressing Modes ....................................................................................1-3
1.3 Arithmetic Instructions...............................................................................1-5
1.4 Logical Instructions ...................................................................................1-6
1.5 Data Transfers .........................................................................................1-7
1.6 External RAM.........................................................................................1-10
1.7 Lookup Tables .......................................................................................1-10
1.8 Boolean Instructions ...............................................................................1-11
1.9 Jump Instructions ....................................................................................1-13
1.10 Read-Modify-Write Instruction Features .................................................1-15
1.11 Instruction Set Summary.........................................................................1-16
1.12 Instructions That Affect Flag Settings .....................................................1-20
1.13 Instruction Table .....................................................................................1-21
1.14 Instruction Definitions..............................................................................1-24
Section 2
Common Features Description ........................................................... 2-66
2.1 Introduction ............................................................................................2-66
2.2 Special Function Registers .....................................................................2-68
2.3 Oscillator and Clock Circuit.....................................................................2-70
2.4 CPU Timing.............................................................................................2-71
2.5 Port Structures and Operation ................................................................2-73
2.6 Accessing External Memory....................................................................2-77
2.7 PSEN ......................................................................................................2-78
2.8 ALE .........................................................................................................2-79
2.9 Timer/Counters .......................................................................................2-81
2.10 Timer 0 ....................................................................................................2-82
2.11 Timer 1 ....................................................................................................2-84
2.12 Timer 2 ....................................................................................................2-89
2.13 Serial Interface........................................................................................2-94
2.14 Framing Error Detection........................................................................2-104
2.15 Automatic Address Recognition ............................................................2-105
2.16 Interrupts ...............................................................................................2-112
Atmel 8051 Microcontrollers Hardware Manual 1-1
Rev. 4316E–8051–01/07
Section 1
The 8051 Instruction Set
The 8051 instruction set is optimized for 8-bit control applications. It provides a variety of
fast addressing modes for accessing the internal RAM to facilitate byte operations on
small data structures. The instruction set provides extensive support for one-bit vari-
ables as a separate data type, allowing direct bit manipulation in control and logic
systems that require Boolean processing.
An overview of the 8051 instruction set is presented below, with a brief description of
how certain instructions might be used.
1.1 Program Status
Word
The Program Status Word (PSW) contains several status bits that reflect the current
state of the CPU. The PSW, shown in Table 1-1 on page 3, resides in SFR space. It
contains the Carry bit, the Auxiliary Carry (for BCD operations), the two register bank
select bits, the Overflow flag, a parity bit, and two user-definable status flags.
The Carry bit, other than serving the functions of a Carry bit in arithmetic operations,
also serves as the “Accumulator” for a number of Boolean operations.
The bits RS0 and RS1 are used to select one of the four register banks shown below.
A number of instructions refer to these RAM locations as R0 through R7. The selection
of which of the four banks is being referred to is made on the basis of the bits RS0 and
RS1 at execution time.
The parity bit reflects the number of 1’s in the Accumulator: P = 1 if the Accumulator
contains an odd number of 1’s, and P = 0 if the Accumulator contains an even number of
1’s. Thus the number of 1’s in the Accumulator plus P is always even.
Two bits in the PSW are uncommitted and may be used as general purpose status flags.
The PSW register contains program status information as detailed in Table 1-1.
The 8051 Instruction Set
Atmel 8051 Microcontrollers Hardware Manual 1-2
4316E–8051–01/07
Table 1-1. PSW: Program Status Word Register
1.2 Addressing
Modes
The addressing modes in the 8051 instruction set are as follows:
1.2.1 Direct Addressing In direct addressing the operand is specified by an 8-bit address field in the instruction.
Only 128 Lowest bytes of internal Data RAM and SFRs can be directly addressed.
1.2.2 Indirect Addressing In indirect addressing the instruction specifies a register which contains the address of
the operand. Both internal and external RAM can be indirectly addressed.
The address register for 8-bit addresses can be R0 or R1 of the selected register bank,
or the Stack Pointer. The address register for 16-bit addresses can only be the 16-bit
“data pointer” register, DPTR.
(MSB) (LSB)
CY AC F0 RS1 RS0 OV - P
Symbol Position Name and Significance
CY PSW.7 Carry flag
AC PSW.6
Auxiliary Carry flag.
(For BCD operations.)
F0 PSW.5
Flag 0
(Available to the user for general purposes.)
RS1 PSW.4
Register bank Select control bits 1 & 0. Set/cleared
by software to determine working register bank (see
Note).
RS0 PSW.3
OV PSW.2 Overflow flag.
- PSW.1 (reserved)
P PSW.0
Parity flag.
Set/cleared by hardware each instruction cycle to
indicate and odd/even number of “one” bits in the
accumulator, i.e., even parity.
Note:
The contents of (RS1, RS0) enable the working register banks as follows:
(0.0)-Bank 0(00H-07H)
(0.1)-Bank 1(08H-0FH)
(1.0)-Bank 2(10H-17H)
(1.1)-Bank 3(18H-1FH)
The 8051 Instruction Set
1-3 Atmel 8051 Microcontrollers Hardware Manual
4316E–8051–01/07
1.2.3 Register
Instructions
The register banks, containing registers R0 through R7, can be accessed by certain
instructions which carry a 3-bit register specification within the opcode of the instruction.
Instructions that access the registers this way are code efficient, since this mode elimi-
nates an address byte. When the instruction is executed, one of the eight registers in the
selected bank is accessed. One of four banks is selected at execution time by the two
bank select bits in the PSW.
1.2.4 Register-specific
Instructions
Some instructions are specific to a certain register. For example, some instructions
always operate on the Accumulator, or Data Pointer, etc., so no address byte is needed
to point to it. The opcode does this itself. Instructions that refer to the Accumulator as ‘A’
assemble as accumulator-specific opcodes.
1.2.5 Immediate
Constants
The value of a constant can follow the opcode in Program Memory. For example;
MOV A, # 100
loads the Accumulator with the decimal number 100. The same number could be speci-
fied in hex digits as 64H.
1.2.6 Indexed Addressing Only Program Memory can be accessed with indexed addressing, and it can only be
read. This addressing mode is intended for reading look-up tables in Program Memory.
A 16-bit base register (either DPTR or the Program Counter) points to the base of the
table, and the Accumulator is set up with the table entry number. The address of the
table entry in Program Memory is formed by adding the Accumulator data to the base
pointer.
Another type of indexed addressing is used in the “case jump” instruction. In this case
the destination address of a jump instruction is computed as the sum of the base pointer
and the Accumulator data.
剩余115页未读,继续阅读
资源评论
whenfall
- 粉丝: 1
- 资源: 2
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功