2019 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS - VOLUME 62
IEEE CAT. NO. CFP19ISS-PRT
SUNDAY through THURSDAY / FEBRUARY 17, 18, 19, 20, and 21, 2019
2019 IEEE INTERNATIONAL
IEEE SOLID-STATE CIRCUITS SOCIETY
SOLID-STATE CIRCUITS CONFERENCE
2019
DIGEST
OF
TECHNICAL
PAPERS
VOLUME SIXTY-TWO
ISSN 0193-6530
2019_00_Cvr.qxp_1up 1/22/19 10:13 PM Page 1
1DIGEST OF TECHNICAL PAPERS •
2019 IEEE INTERNATIONAL
SOLID-STATE CIRCUITS CONFERENCE
DIGEST OF TECHNICAL PAPERS
First Edition
February 2019
IEEE Catalog Number CFP19ISS-PRT
2 • 2019 IEEE International Solid-State Circuits Conference
2019 IEEE International Solid-State Circuits Conference
DIGEST OF TECHNICAL PAPERS
Copyright and Reprint Permission:
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photocopy beyond the limit of U.S. copyright law for private use of patrons those
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the per-copy fee indicated in the code is paid through Copyright Clearance Center,
222 Rosewood Drive, Danvers, MA 01923. For reprint or republication
permission, email to IEEE Copyrights Manager at pubs-permissions@ieee.org.
All rights reserved. Copyright ©2019 by IEEE.
PREPRESS IN THE UNITED STATES OF AMERICA
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iPublishing, Inc.
Lisbon Falls, Maine
PRINTED IN THE UNITED STATES OF AMERICA
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VOLUME 62
IEEE Cat. No. CFP19ISS-PRT
ISBN Softbound 978-1-5386-8531-0
Library of Congress Number 81-644810
ISSN 0193-6530
Publisher and Managing Editor: Laura C. Fujino
Technical Editors: Jason H. Anderson, Leonid Belostotski, Dustin Dunwell, Vincent Gaudet,
Glenn Gulak, James W. Haslett, David Halupka, Kenneth C. Smith
978-1-5386-8531-0/19/$31.00 ©2019 IEEE
3DIGEST OF TECHNICAL PAPERS •
REFLECTIONS.................................................................................4
The Saratoga Group – Three Decades of History..........................5
FOREWORD....................................................................................8
AWARDS.......................................................................................27
PAPER SESSIONS
1 Plenary Session......................................................................10
2 Processors.............................................................................40
3 Nyquist Rate ADCs.................................................................56
4 Power Amplifiers....................................................................72
5 Image Sensors.......................................................................92
6 Ultra-High-Speed Wireline...................................................110
7 Machine Learning.................................................................128
8 DC-DC Converters................................................................144
9 High-Frequency Transceivers for Radar...............................160
and Communications
10 Sensor Interfaces.................................................................178
11 Diagnostics..........................................................................188
12 Emerging Technologies........................................................200
13 Non-Volatile Memories.........................................................208
14 Machine Learning & Digital LDO Circuits.............................220
15 Power for 5G, Wireless Power, and GaN Converters.............236
16 Frequency Synthesizers........................................................254
17 Technologies for Human Interaction & Health......................274
18 Analog Techniques...............................................................292
19 Adaptive Digital & Clocking Techniques...............................310
20 Noise-Shaped & VCO-Based ADCs.......................................326
21 4G/5G Transceivers..............................................................342
22 Physiological Monitoring......................................................358
23 DRAM..................................................................................376
24 SRAM & Computation-in-Memory.......................................386
25 Circuits Enabling Security....................................................398
26 Frequency Generation & Interference Mitigation..................406
27 Energy Harvesting & DC/DC Control Techniques.................418
28 Techniques for Low-Power & High-Performance Wireless...436
29 Quantum & Photonics Technologies....................................454
30 Advanced Wireline Techniques.............................................472
TUTORIALS
TUTORIALS 1-10.......................................................493
FORUMS
F1 Sub-6GHz 5G Radio Circuits and Systems:........................496
From Concepts to Silicon
F2 Memory-Centric Computing from IoT.................................498
to Artificial Intelligence and Machine Learning
F3 The Complete Advanced Driver-Assistance System............501
(ADAS) Sensing Network
F4 Intelligence at the Edge:......................................................504
How Can We Make Machine Learning More Energy Efficient?
F5 56Gb/s to 112Gb/s and Beyond –.......................................507
Design Challenges and Solutions in Wireline Communications
F6 The Right Tool for the Job:.................................................510
Application Optimized Data Converters
EVENING EVENTS
EE1 Student Research Preview: Short Presentations................512
with Poster Session
EE2 How to Save Lives With Circuits.........................................514
EE3 Making a Career Choice......................................................516
EE4 Industry Showcase.............................................................517
EE5 Moving to 'The Dark Side'!.................................................519
EE6 How Can Hardware Designers Reclaim the Spotlight?........521
SHORT COURSE
SC Integrated Phased Arrays:....................................................524
Theory, Practice, and Implementation for 5G and Beyond
INDEX TO AUTHORS...................................................................526
COMMITTEES..............................................................................530
CONFERENCE LAYOUT...............................................................534
2020 CALL FOR PAPERS............................................................535
CONFERENCE TIMETABLE...........................................................536
TABLE OF CONTENTS
4 • 2019 IEEE International Solid-State Circuits Conference 978-1-5386-8531-0/19/$31.00 ©2019 IEEE
What you see before you this year, is the result of many many years of continuous iterative refinement of the submission
process and information processing. Again, this year, we continue to provide a simplified printed Digest, in which the
continuation pages (typically including a micrograph and occasionally summary data) are not included, but are available
in the Digest download and in IEEE Xplore. In order to be more-green, we continue to use partially recycled paper.
Once more, this year, we have a technical editorial group (listed below) under the direction of a managing editor (Laura
Chizuko Fujino). Again, we emphasize full technical and language editing of most papers, as the need dictates.
In recognition of the large amount of work leading to the Digest open before you, I wish to acknowledge a great many
individuals: Eugenio Cantatore, Un-Ku Moon, Jan van der Spiegel, Anantha Chandrakasan, members of the ITPC, and
all of the authors, for their individual contributions; Brad Phillips, and Mira Digital Publishing, for Web-based and other
preparatory support, including continuing improvement and facilitation of the paper-review and pre-voting process in
a new double-blind world, as well as preparation and implementation of the downloads available at the Conference;
Steve Bonney, and S
3
iPublishing, for author and Session-Chair interaction, for figure layout, for paper formatting, for
pre-press preparation, for printer interfacing, and for general assistance; Melissa Widerkehr, and Widerkehr and
Associates, for general interfacing, problem-solving, and coordination; Jason Anderson (University of Toronto), Leo
Belostotski (University of Calgary), Dustin Dunwell (Huawei Technologies), Vincent Gaudet (University of Waterloo),
Glenn Gulak (University of Toronto), David Halupka (Intel), James Haslett (University of Calgary), and K. C. Smith
(University of Toronto), as technical editors for heroic effort on the usual tight schedule.
My sincere thanks to you all!
P.S. This year marks the 30-year anniversary of the formation of the Saratoga Group, largely composed of graduate-
student volunteers from the University of Toronto. The following few pages describes some of the history of this novel
group.
Laura Chizuko Fujino
ISSCC Director of Publications and Presentations
February 2019
Reflections
