Zynq-7000 AP SoC系列管脚分配

******************************************************************************* ** � Copyright 2013 Xilinx, Inc. All rights reserved. ** This file contains confidential and proprietary information of Xilinx, Inc. and ** is protected under U.S. and international copyright and other intellectual property laws. ******************************************************************************* ** ____ ____ ** / /\/ / ** /___/ \ / Vendor: Xilinx ** \ \ \/ ** \ \ readme.txt Version: 1.6 ** / / Date Last Modified: 11/21/14 ** /___/ /\ Date Created: 12/12/11 ** \ \ / \ Associated Filename: 7zSeriesALL.zip ** \___\/\___\ ** ** Device: 7 Series FPGAs ** Revision History: ** v1.0: Added XC7Z010 and XC7Z020 CLG484 and CLG400 packages ** v1.1: Changed pin R6 from RSVDGND to RSVDVCC in CLG400 packages ** v1.2: Added XC7Z030 FBG484, FBG676, and FFG676 packages ** Added XC7Z045 FBG676, FFG676, and FFG900 packages ** v1.3: Added XC7Z010 CLG225 package ** Removed XC7010 CLG484 package ** Modified all packages to account for pin name change (RSVDVCC[3;1]) ** v1.4: Added FFG900 and FFG1156 packages for XC7Z100 ** v1.5: Added XC7Z015 CLG485 package ** Added XC7Z030 SBG485 package ** v1.6: Added XC7Z035 packages ** ******************************************************************************* ** ** Disclaimer: ** ** This disclaimer is not a license and does not grant any rights to the materials ** distributed herewith. Except as otherwise provided in a valid license issued to you ** by Xilinx, and to the maximum extent permitted by applicable law: ** (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL FAULTS, ** AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, ** INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR ** FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract ** or tort, including negligence, or under any other theory of liability) for any loss or damage ** of any kind or nature related to, arising under or in connection with these materials, ** including for any direct, or any indirect, special, incidental, or consequential loss ** or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered ** as a result of any action brought by a third party) even if such damage or loss was ** reasonably foreseeable or Xilinx had been advised of the possibility of the same. ** Critical Applications: ** ** Xilinx products are not designed or intended to be fail-safe, or for use in any application ** requiring fail-safe performance, such as life-support or safety devices or systems, ** Class III medical devices, nuclear facilities, applications related to the deployment of airbags, ** or any other applications that could lead to death, personal injury, or severe property or ** environmental damage (individually and collectively, "Critical Applications"). Customer assumes ** the sole risk and liability of any use of Xilinx products in Critical Applications, subject only ** to applicable laws and regulations governing limitations on product liability. ** THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE AT ALL TIMES. ******************************************************************************* ** IMPORTANT NOTES ** 1) These ASCII text files contain advance information and are subject to change without notice and are provided solely for information purposes. 2) Please refer to the Zynq-7000 SoC Package Files section of UG865, Zynq-7000 SoC Packaging and Pinout Specifications, for detailed information on the contents of the ASCII text files.