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Copyright © 2008 ARM Limited. All rights reserved.
ARM IHI 0048A
ARM
®
Generic Interrupt Controller
Architecture version 1.0
Architecture Specification
ii Copyright © 2008 ARM Limited. All rights reserved. ARM IHI 0048A
Non-Confidential
Unrestricted Access
ARM Generic Interrupt Controller
Copyright © 2008 ARM Limited. All rights reserved.
Release Information
The following changes have been made to this document.
Proprietary Notice
Words and logos marked with
®
or
™
are registered trademarks or trademarks of ARM Limited in the EU and other
countries, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be
the trademarks of their respective owners.
The product described in this document is subject to continuous developments and improvements. All particulars of the
product and its use contained in this document are given by ARM in good faith. Neither the whole nor any part of the
information contained in, or the product described in, this document may be adapted or reproduced in any material form
except with the prior written permission of the copyright holder.
1. Subject to the provisions of Clauses 2 and 3, ARM hereby grants to you a perpetual, non-exclusive,
non-transferable, royalty free, worldwide licence to use and copy the ARM Generic Interrupt Controller (GIC)
Architecture Specification (“Specification”) for the purpose of developing, having developed, manufacturing,
having manufactured, offering to sell, selling, supplying or otherwise distributing products which comply with
the Specification and which contain at least one processor core which has either been (i) developed by or for ARM
or (ii) developed under licence from ARM.
2. THE ARM GIC ARCHITECTURE SPECIFICATION IS PROVIDED “AS IS” WITH NO WARRANTIES
EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF
SATISFACTORY QUALITY, NONINFRINGEMENT OR FITNESS FOR A PARTICULAR PURPOSE.
3. No licence, express, implied or otherwise, is granted to you, under the provisions of Clause 1, to use the ARM
tradename in connection with the ARM GIC Architecture Specification or any products based thereon. Nothing
in Clause 1 shall be construed as authority for you to make any representations on behalf of ARM in respect of
the ARM GIC Architecture Specification.
Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”.
Copyright © 2008 ARM Limited
110 Fulbourn Road Cambridge, England CB1 9NJ
Restricted Rights Legend: Use, duplication or disclosure by the United States Government is subject to the restrictions
set forth in DFARS 252.227-7013 (c)(1)(ii) and FAR 52.227-19.
This document is Non-Confidential. The right to use, copy and disclose this document is subject to the licence set out
above.
Unrestricted Access is an ARM internal classification.
Change History
Date Issue Confidentiality Change
23 September 2008 A Non-Confidential Unrestricted Access First release for version 1.0
ARM IHI 0048A Copyright © 2008 ARM Limited. All rights reserved. iii
Unrestricted Access Non-Confidential
Contents
ARM Generic Interrupt Controller
Architecture Specification
Preface
About this specification ......................................................................... vi
Conventions ........................................................................................ viii
Further reading ..................................................................................... ix
Feedback ............................................................................................... x
Chapter 1 Introduction
1.1 About the Generic Interrupt Controller architecture ........................... 1-2
1.2 Security Extensions support .............................................................. 1-3
1.3 Terminology ....................................................................................... 1-4
Chapter 2 GIC Partitioning
2.1 About GIC partitioning ........................................................................ 2-2
2.2 The Distributor ................................................................................... 2-4
2.3 CPU interfaces ................................................................................... 2-6
Chapter 3 Interrupt Handling and Prioritization
3.1 About interrupt handling and prioritization .......................................... 3-2
3.2 General handling of interrupts ............................................................ 3-5
3.3 Interrupt prioritization ....................................................................... 3-12
Contents
iv Copyright © 2008 ARM Limited. All rights reserved. ARM IHI 0048A
Non-Confidential
Unrestricted Access
3.4 The effect of the Security Extensions on interrupt handling ............. 3-15
3.5 The effect of the Security Extensions on interrupt prioritization ....... 3-18
3.6 Pseudocode details of interrupt handling and prioritization ............. 3-25
Chapter 4 Programmers Model
4.1 About the programmers model .......................................................... 4-2
4.2 Effect of the Security Extensions on the programmers model ........... 4-7
4.3 Distributor register descriptions ....................................................... 4-11
4.4 CPU interface register descriptions ................................................. 4-46
Appendix A Pseudocode Index
A.1 Index of pseudocode functions .......................................................... A-2
Appendix B Software Examples for the GIC
B.1 Use of identification registers ............................................................. B-2
B.2 Initialization after reset or power on ................................................... B-3
B.3 Processor response to an initial interrupt ........................................... B-6
B.4 Preemptive processing ...................................................................... B-9
B.5 Generating a software interrupt ....................................................... B-12
B.6 Changing a CPU interface interrupt priority mask ............................ B-13
B.7 Changing the priority of an interrupt ................................................. B-14
B.8 Changing the processor targets of an interrupt ................................ B-15
B.9 Disabling a peripheral interrupt ........................................................ B-16
B.10 Changing the security configuration of an interrupt ......................... B-17
B.11 Disabling a CPU interface on the GIC ............................................. B-19
B.12 Message passing between processors ............................................ B-20
B.13 Example of using the binary point .................................................... B-21
Appendix C Register Shortform Names
C.1 Register name aliases ....................................................................... C-2
C.2 Index of architectural shortform names .............................................. C-4
Glossary
ARM IHI 0048A Copyright © 2008 ARM Limited. All rights reserved. v
Unrestricted Access Non-Confidential
Preface
This preface summarizes the contents of this specification and lists the conventions it uses. It contains the
following sections:
• About this specification on page vi
• Conventions on page viii
• Further reading on page ix
• Feedback on page x.
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