/*
* PowerPC CPU initialization for qemu.
*
* Copyright (c) 2003-2007 Jocelyn Mayer
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
*/
/* A lot of PowerPC definition have been included here.
* Most of them are not usable for now but have been kept
* inside "#if defined(TODO) ... #endif" statements to make tests easier.
*/
#include "dis-asm.h"
#include "gdbstub.h"
//#define PPC_DUMP_CPU
//#define PPC_DEBUG_SPR
//#define PPC_DUMP_SPR_ACCESSES
#if defined(CONFIG_USER_ONLY)
#define TODO_USER_ONLY 1
#endif
struct ppc_def_t {
const char *name;
uint32_t pvr;
uint32_t svr;
uint64_t insns_flags;
uint64_t msr_mask;
powerpc_mmu_t mmu_model;
powerpc_excp_t excp_model;
powerpc_input_t bus_model;
uint32_t flags;
int bfd_mach;
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
};
/* For user-mode emulation, we don't emulate any IRQ controller */
#if defined(CONFIG_USER_ONLY)
#define PPC_IRQ_INIT_FN(name) \
static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env) \
{ \
}
#else
#define PPC_IRQ_INIT_FN(name) \
void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
#endif
PPC_IRQ_INIT_FN(40x);
PPC_IRQ_INIT_FN(6xx);
PPC_IRQ_INIT_FN(970);
PPC_IRQ_INIT_FN(e500);
/* Generic callbacks:
* do nothing but store/retrieve spr value
*/
static void spr_read_generic (void *opaque, int gprn, int sprn)
{
gen_load_spr(cpu_gpr[gprn], sprn);
#ifdef PPC_DUMP_SPR_ACCESSES
{
TCGv t0 = tcg_const_i32(sprn);
gen_helper_load_dump_spr(t0);
tcg_temp_free_i32(t0);
}
#endif
}
static void spr_write_generic (void *opaque, int sprn, int gprn)
{
gen_store_spr(sprn, cpu_gpr[gprn]);
#ifdef PPC_DUMP_SPR_ACCESSES
{
TCGv t0 = tcg_const_i32(sprn);
gen_helper_store_dump_spr(t0);
tcg_temp_free_i32(t0);
}
#endif
}
#if !defined(CONFIG_USER_ONLY)
static void spr_write_clear (void *opaque, int sprn, int gprn)
{
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
gen_load_spr(t0, sprn);
tcg_gen_neg_tl(t1, cpu_gpr[gprn]);
tcg_gen_and_tl(t0, t0, t1);
gen_store_spr(sprn, t0);
tcg_temp_free(t0);
tcg_temp_free(t1);
}
#endif
/* SPR common to all PowerPC */
/* XER */
static void spr_read_xer (void *opaque, int gprn, int sprn)
{
tcg_gen_mov_tl(cpu_gpr[gprn], cpu_xer);
}
static void spr_write_xer (void *opaque, int sprn, int gprn)
{
tcg_gen_mov_tl(cpu_xer, cpu_gpr[gprn]);
}
/* LR */
static void spr_read_lr (void *opaque, int gprn, int sprn)
{
tcg_gen_mov_tl(cpu_gpr[gprn], cpu_lr);
}
static void spr_write_lr (void *opaque, int sprn, int gprn)
{
tcg_gen_mov_tl(cpu_lr, cpu_gpr[gprn]);
}
/* CTR */
static void spr_read_ctr (void *opaque, int gprn, int sprn)
{
tcg_gen_mov_tl(cpu_gpr[gprn], cpu_ctr);
}
static void spr_write_ctr (void *opaque, int sprn, int gprn)
{
tcg_gen_mov_tl(cpu_ctr, cpu_gpr[gprn]);
}
/* User read access to SPR */
/* USPRx */
/* UMMCRx */
/* UPMCx */
/* USIA */
/* UDECR */
static void spr_read_ureg (void *opaque, int gprn, int sprn)
{
gen_load_spr(cpu_gpr[gprn], sprn + 0x10);
}
/* SPR common to all non-embedded PowerPC */
/* DECR */
#if !defined(CONFIG_USER_ONLY)
static void spr_read_decr (void *opaque, int gprn, int sprn)
{
gen_helper_load_decr(cpu_gpr[gprn]);
}
static void spr_write_decr (void *opaque, int sprn, int gprn)
{
gen_helper_store_decr(cpu_gpr[gprn]);
}
#endif
/* SPR common to all non-embedded PowerPC, except 601 */
/* Time base */
static void spr_read_tbl (void *opaque, int gprn, int sprn)
{
gen_helper_load_tbl(cpu_gpr[gprn]);
}
static void spr_read_tbu (void *opaque, int gprn, int sprn)
{
gen_helper_load_tbu(cpu_gpr[gprn]);
}
__attribute__ (( unused ))
static void spr_read_atbl (void *opaque, int gprn, int sprn)
{
gen_helper_load_atbl(cpu_gpr[gprn]);
}
__attribute__ (( unused ))
static void spr_read_atbu (void *opaque, int gprn, int sprn)
{
gen_helper_load_atbu(cpu_gpr[gprn]);
}
#if !defined(CONFIG_USER_ONLY)
static void spr_write_tbl (void *opaque, int sprn, int gprn)
{
gen_helper_store_tbl(cpu_gpr[gprn]);
}
static void spr_write_tbu (void *opaque, int sprn, int gprn)
{
gen_helper_store_tbu(cpu_gpr[gprn]);
}
__attribute__ (( unused ))
static void spr_write_atbl (void *opaque, int sprn, int gprn)
{
gen_helper_store_atbl(cpu_gpr[gprn]);
}
__attribute__ (( unused ))
static void spr_write_atbu (void *opaque, int sprn, int gprn)
{
gen_helper_store_atbu(cpu_gpr[gprn]);
}
#endif
#if !defined(CONFIG_USER_ONLY)
/* IBAT0U...IBAT0U */
/* IBAT0L...IBAT7L */
static void spr_read_ibat (void *opaque, int gprn, int sprn)
{
tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUState, IBAT[sprn & 1][(sprn - SPR_IBAT0U) / 2]));
}
static void spr_read_ibat_h (void *opaque, int gprn, int sprn)
{
tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUState, IBAT[sprn & 1][(sprn - SPR_IBAT4U) / 2]));
}
static void spr_write_ibatu (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT0U) / 2);
gen_helper_store_ibatu(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
static void spr_write_ibatu_h (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT4U) / 2);
gen_helper_store_ibatu(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
static void spr_write_ibatl (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT0L) / 2);
gen_helper_store_ibatl(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
static void spr_write_ibatl_h (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT4L) / 2);
gen_helper_store_ibatl(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
/* DBAT0U...DBAT7U */
/* DBAT0L...DBAT7L */
static void spr_read_dbat (void *opaque, int gprn, int sprn)
{
tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUState, DBAT[sprn & 1][(sprn - SPR_DBAT0U) / 2]));
}
static void spr_read_dbat_h (void *opaque, int gprn, int sprn)
{
tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUState, DBAT[sprn & 1][((sprn - SPR_DBAT4U) / 2) + 4]));
}
static void spr_write_dbatu (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32((sprn - SPR_DBAT0U) / 2);
gen_helper_store_dbatu(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
static void spr_write_dbatu_h (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_DBAT4U) / 2) + 4);
gen_helper_store_dbatu(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
static void spr_write_dbatl (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32((sprn - SPR_DBAT0L) / 2);
gen_helper_store_dbatl(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
static void spr_write_dbatl_h (void *opaque, int sprn, int gprn)
{
TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_DBAT4L) / 2) + 4);
gen_helper_store_dbatl(t0, cpu_gpr[gprn]);
tcg_temp_free_i32(t0);
}
/* SDR1 */
static void spr_read_sdr1 (void *opaque, int gprn, int sprn)
{
tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUState, sdr1));
}
static void spr_write_sdr1 (void *opaque, int spr
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Xen-4.0.1虚拟机API接口
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py:439个
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2013-11-26
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Xen-4.0.1虚拟机API接口 (4360个子文件)
ZPL-2.0 2KB
README-XenSource-initrd-1.0-img 2KB
00cvs 49KB
00INSTALL 2KB
00README 897B
00README 653B
xm.pod.1 41KB
vn.pod.1 6KB
xentop.1 3KB
io_submit.1 2KB
xentrace_format.1 1KB
io_getevents.1 1KB
io_setup.1 940B
io_cancel.1 865B
io_destroy.1 526B
README-XenSource-initrd-1.1-img 2KB
io.3 9KB
aio.3 9KB
lio_listio.3 5KB
aio_write.3 4KB
io_submit.3 4KB
aio_cancel.3 3KB
aio_fsync.3 3KB
aio_read.3 3KB
aio_suspend.3 3KB
io_getevents.3 3KB
io_prep_fsync.3 2KB
aio_init.3 2KB
io_fsync.3 2KB
aio_error.3 2KB
io_prep_pread.3 2KB
io_cancel.3 2KB
io_prep_pwrite.3 2KB
aio_return.3 2KB
io_queue_wait.3 1KB
aio_error64.3 1KB
io_queue_init.3 1KB
aio_write64.3 1KB
aio_read64.3 1KB
aio_suspend64.3 1KB
io_queue_release.3 1KB
io_queue_run.3 1020B
aio_fsync64.3 1020B
aio_return64.3 1007B
aio_cancel64.3 996B
io_set_callback.3 991B
lio_listio64.3 930B
Makefile-2.4 3KB
xmdomain.cfg.pod.5 8KB
xend-config.sxp.pod.5 4KB
Makefile-2.6 2KB
mk.linux-2.6 196B
mk.linux-2.6-common 6KB
mk.linux-2.6-git 55B
mk.linux-2.6-mm 54B
mk.linux-2.6-native 124B
mk.linux-2.6-pvops 444B
mk.linux-2.6-rc 54B
mk.linux-2.6-tip 55B
mk.linux-2.6-tip-latest 463B
mk.linux-2.6-xen 116B
mk.linux-2.6-xen0 59B
mk.linux-2.6-xenU 59B
README-XenSource-initrd-0.7-img 2KB
xentrace.8 4KB
README-XenSource-initrd-0.8-img 2KB
99minios 39KB
configure.ac 5KB
access_vectors 2KB
acm_getlabel 1KB
xen-backend.agent 566B
Makefile.am 4KB
Makefile.am 835B
Makefile.am 676B
Makefile.am 660B
Makefile.am 655B
Makefile.am 640B
Makefile.am 522B
Makefile.am 504B
Makefile.am 466B
Makefile.am 461B
Makefile.am 437B
Makefile.am 431B
Makefile.am 400B
Makefile.am 391B
Makefile.am 386B
Makefile.am 384B
Makefile.am 361B
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Makefile.am 334B
Makefile.am 318B
Makefile.am 316B
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Makefile.am 289B
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