没有合适的资源?快使用搜索试试~ 我知道了~
AT32UC3A0_A1英文资料
需积分: 9 1 下载量 138 浏览量
2016-04-26
17:06:36
上传
评论
收藏 10.57MB PDF 举报
温馨提示
试读
826页
AT32UC3A0_A1系列单片机的详细英文介绍。
资源推荐
资源详情
资源评论
Features
• High Performance, Low Power 32-Bit Atmel
®
AVR
®
Microcontroller
– Compact Single-cycle RISC Instruction Set Including DSP Instruction Set
– Read-Modify-Write Instructions and Atomic Bit Manipulation
– Performing 1.49 DMIPS / MHz
Up to 91 DMIPS Running at 66 MHz from Flash (1 Wait-State)
Up to 49 DMIPS Running at 33MHz from Flash (0 Wait-State)
– Memory Protection Unit
• Multi-hierarchy Bus System
– High-Performance Data Transfers on Separate Buses for Increased Performance
– 15 Peripheral DMA Channels Improves Speed for Peripheral Communication
• Internal High-Speed Flash
– 512K Bytes, 256K Bytes, 128K Bytes Versions
– Single Cycle Access up to 33 MHz
– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
– 4ms Page Programming Time and 8ms Full-Chip Erase Time
– 100,000 Write Cycles, 15-year Data Retention Capability
– Flash Security Locks and User Defined Configuration Area
• Internal High-Speed SRAM, Single-Cycle Access at Full Speed
– 64K Bytes (512KB and 256KB Flash), 32K Bytes (128KB Flash)
• External Memory Interface on AT32UC3A0 Derivatives
– SDRAM / SRAM Compatible Memory Bus (16-bit Data and 24-bit Address Buses)
• Interrupt Controller
– Autovectored Low Latency Interrupt Service with Programmable Priority
• System Functions
– Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator
– Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL) allowing
Independant CPU Frequency from USB Frequency
– Watchdog Timer, Real-Time Clock Timer
• Universal Serial Bus (USB)
– Device 2.0 Full Speed and On-The-Go (OTG) Low Speed and Full Speed
– Flexible End-Point Configuration and Management with Dedicated DMA Channels
– On-chip Transceivers Including Pull-Ups
• Ethernet MAC 10/100 Mbps interface
– 802.3 Ethernet Media Access Controller
– Supports Media Independent Interface (MII) and Reduced MII (RMII)
• One Three-Channel 16-bit Timer/Counter (TC)
– Three External Clock Inputs, PWM, Capture and Various Counting Capabilities
• One 7-Channel 16-bit Pulse Width Modulation Controller (PWM)
• Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Independant Baudrate Generator, Support for SPI, IrDA and ISO7816 interfaces
– Support for Hardware Handshaking, RS485 Interfaces and Modem Line
• Two Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signals
• One Synchronous Serial Protocol Controller
– Supports I2S and Generic Frame-Based Protocols
• One Master/Slave Two-Wire Interface (TWI), 400kbit/s I2C-compatible
• One 8-channel 10-bit Analog-To-Digital Converter
• 16-bit Stereo Audio Bitstream
– Sample Rate Up to 50 KHz
32-Bit Atmel AVR
Microcontroller
AT32UC3A0512
AT32UC3A0256
AT32UC3A0128
AT32UC3A1512
AT32UC3A1256
AT32UC3A1128
32058K-
AVR32-01/12
2
AT32UC3A
• On-Chip Debug System (JTAG interface)
– Nexus Class 2+, Runtime Control, Non-Intrusive Data and Program Trace
• 100-pin TQFP (69 GPIO pins), 144-pin LQFP (109 GPIO pins) , 144 BGA (109 GPIO pins)
• 5V Input Tolerant I/Os
• Single 3.3V Power Supply or Dual 1.8V-3.3V Power Supply
32058K
AVR32-01/12
3
AT32UC3A
1. Description
The AT32UC3A is a complete System-On-Chip microcontroller based on the AVR32 UC RISC
processor running at frequencies up to 66 MHz. AVR32 UC is a high-performance 32-bit RISC
microprocessor core, designed for cost-sensitive embedded applications, with particular empha-
sis on low power consumption, high code density and high performance.
The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt con-
troller for supporting modern operating systems and real-time operating systems. Higher
computation capabilities are achievable using a rich set of DSP instructions.
The AT32UC3A incorporates on-chip Flash and SRAM memories for secure and fast access.
For applications requiring additional memory, an external memory interface is provided on
AT32UC3A0 derivatives.
The Peripheral Direct Memory Access controller (PDCA) enables data transfers between periph-
erals and memories without processor involvement. PDCA drastically reduces processing
overhead when transferring continuous and large data streams between modules within the
MCU.
The PowerManager improves design flexibility and security: the on-chip Brown-Out Detector
monitors the power supply, the CPU runs from the on-chip RC oscillator or from one of external
oscillator sources, a Real-Time Clock and its associated timer keeps track of the time.
The Timer/Counter includes three identical 16-bit timer/counter channels. Each channel can be
independently programmed to perform frequency measurement, event counting, interval mea-
surement, pulse generation, delay timing and pulse width modulation.
The PWM modules provides seven independent channels with many configuration options
including polarity, edge alignment and waveform non overlap control. One PWM channel can
trigger ADC conversions for more accurate close loop control implementations.
The AT32UC3A also features many communication interfaces for communication intensive
applications. In addition to standard serial interfaces like UART, SPI or TWI, other interfaces like
flexible Synchronous Serial Controller, USB and Ethernet MAC are available.
The Synchronous Serial Controller provides easy access to serial communication protocols and
audio standards like I2S.
The Full-Speed USB 2.0 Device interface supports several USB Classes at the same time
thanks to the rich End-Point configuration. The On-The-GO (OTG) Host interface allows device
like a USB Flash disk or a USB printer to be directly connected to the processor.
The media-independent interface (MII) and reduced MII (RMII) 10/100 Ethernet MAC module
provides on-chip solutions for network-connected devices.
AT32UC3A integrates a class 2+ Nexus 2.0 On-Chip Debug (OCD) System, with non-intrusive
real-time trace, full-speed read/write memory access in addition to basic runtime control.
32058K
AVR32-01/12
4
AT32UC3A
2. Configuration Summary
The table below lists all AT32UC3A memory and package configurations:
3. Abbreviations
• GCLK: Power Manager Generic Clock
• GPIO: General Purpose Input/Output
• HSB: High Speed Bus
• MPU: Memory Protection Unit
• OCD: On Chip Debug
• PB: Peripheral Bus
• PDCA: Peripheral Direct Memory Access Controller (PDC) version A
• USBB: USB On-The-GO Controller version B
Device Flash SRAM Ext. Bus Interface
Ethernet
MAC Package
AT32UC3A0512 512 Kbytes 64 Kbytes yes yes 144 pin LQFP
144 pin BGA
AT32UC3A0256 256 Kbytes 64 Kbytes yes yes 144 pin LQFP
144 pin BGA
AT32UC3A0128 128 Kbytes 32 Kbytes yes yes 144 pin LQFP
144 pin BGA
AT32UC3A1512 512 Kbytes 64 Kbytes no yes 100 pin TQFP
AT32UC3A1256 256 Kbytes 64 Kbytes no yes 100 pin TQFP
AT32UC3A1128 128 Kbytes 32 Kbytes no yes 100 pin TQFP
32058K
AVR32-01/12
5
AT32UC3A
4. Blockdiagram
Figure 4-1. Blockdiagram
UC CPU
NEXUS
CLASS 2+
OCD
INSTR
INTERFACE
DATA
INTERFACE
TIMER/COUNTER
INTERRUPT
CONTROLLER
REAL TIME
COUNTER
PERIPHERAL
DMA
CONTROLLER
512 KB
FLASH
HSB-PB
BRIDGE B
HSB-PB
BRIDGE A
MEMORY INTERFACE
S
M M M
M
M
S
S
S
S
S
M
EXTERNAL
INTERRUPT
CONTROLLER
HIGH SPEED
BUS MATRIX
FAST GPIO
GENERAL PURPOSE IOs
64 KB
SRAM
GENERAL PURPOSE IOs
PA
PB
PC
PX
A[2..0]
B[2..0]
CLK[2..0]
EXTINT[7..0]
KPS[7..0]
NMI_N
GCLK[3..0]
XIN32
XOUT32
XIN0
XOUT0
PA
PB
PC
PX
RESET_N
EXTERNAL BUS INTERFACE
(SDRAM & STATIC MEMORY
CONTROLLER)
CAS
RAS
SDA10
SDCK
SDCKE
SDCS0
SDWE
NCS[3..0]
NRD
NWAIT
NWE0
DATA[15..0]
USB
INTERFACE
DMA
ID
VBOF
VBUS
D-
D+
ETHERNET
MAC
DMA
32 KHz
OSC
115 kHz
RCOSC
OSC0
PLL0
PULSE WIDTH
MODULATION
CONTROLLER
SERIAL
PERIPHERAL
INTERFACE 0/1
TWO-WIRE
INTERFACE
PDCPDC PDC
MISO, MOSI
NPCS[3..1]
PWM[6..0]
SCL
SDA
USART1
PDC
RXD
TXD
CLK
RTS, CTS
DSR, DTR, DCD, RI
USART0
USART2
USART3
PDC
RXD
TXD
CLK
RTS, CTS
SYNCHRONOUS
SERIAL
CONTROLLER
PDC
TX_CLOCK, TX_FRAME_SYNC
RX_DATA
TX_DATA
RX_CLOCK, RX_FRAME_SYNC
ANALOG TO
DIGITAL
CONVERTER
PDC
AD[7..0]
ADVREF
WATCHDOG
TIMER
XIN1
XOUT1
OSC1
PLL1
SCK
JTAG
INTERFACE
MCKO
MDO[5..0]
MSEO[1..0]
EVTI_N
EVTO_N
TCK
TDO
TDI
TMS
POWER
MANAGER
RESET
CONTROLLER
ADDR[23..0]
SLEEP
CONTROLLER
CLOCK
CONTROLLER
CLOCK
GENERATOR
COL,
CRS,
RXD[3..0],
RX_CLK,
RX_DV,
RX_ER
MDC,
TXD[3..0],
TX_CLK,
TX_EN,
TX_ER,
SPEED
MDIO
FLASH
CONTROLLER
CONFIGURATION REGISTERS BUS
MEMORY PROTECTION UNIT
PB
PB
HSB
HS
B
NWE1
NWE3
PBA
PBB
NPCS0
LOCAL BUS
INTERFACE
AUDIO
BITSTREAM
DAC
PDC
DATA[1..0]
DATAN[1..0]
32058K
AVR32-01/12
剩余825页未读,继续阅读
资源评论
木子月月鱼
- 粉丝: 11
- 资源: 9
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
最新资源
- Unity适用于Windows与移动平台双端的轮盘交互式提示菜单
- UE5/UE4超详细教程接入科大讯飞语音唤醒SDK并初始持久监听(10102错误码解决)
- 靠搬运古装剧解说视频,日收益200+,作品原创度90%以上,超详细教程-教程网盘链接提取码下载 .txt
- 2024最强数学建模之美赛攻略.md
- STM32单片机FPGA毕设电路原理论文报告一种机器人寻线控制系统
- STM32单片机FPGA毕设电路原理论文报告一种光电编码器位置检测系统研究与应用
- linux常用命令大全
- ACM题库,分类整理.md
- STM32单片机FPGA毕设电路原理论文报告一种高速折刀运动控制系统的设计与实现
- ZYWIFI0939C循迹、红外避障、遥控综合程序.plg
资源上传下载、课程学习等过程中有任何疑问或建议,欢迎提出宝贵意见哦~我们会及时处理!
点击此处反馈
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功