Allwinner_A40i_Datasheet_V1.1.pdf资源-CSDN文库

A40i

1星需积分: 50 104 浏览量 2019-11-27 10:39:54 上传评论 1 收藏 24.37MB PDF 举报

资源推荐

资源详情

资源评论

A40i User Manual

Revision 1.1

Jun. 15, 2018

Contents

Declaration ............................................................................................................................................................................ 2

Revision History..................................................................................................................................................................... 3

Contents ................................................................................................................................................................................ 4

Figures ................................................................................................................................................................................. 32

Tables .................................................................................................................................................................................. 35

Chapter 1. About This Documentation ............................................................................................................................... 37

1.1. Purpose ................................................................................................................................................................ 37

1.2. Intended Audience ............................................................................................................................................... 37

1.3. Symbol Conventions ............................................................................................................................................. 37

1.4. Notes .................................................................................................................................................................... 37

1.4.1. Register Attributes .................................................................................................................................... 37

1.4.2. Reset Value Conventions ........................................................................................................................... 38

1.4.3. Numerical System...................................................................................................................................... 38

1.5. Acronyms and Abbreviations ............................................................................................................................... 38

Chapter 2. Overview............................................................................................................................................................ 41

2.1. Processor Overview ............................................................................................................................................. 42

2.2. Features ............................................................................................................................................................... 43

2.2.1. CPU Architecture ....................................................................................................................................... 43

2.2.2. GPU Architecture....................................................................................................................................... 43

2.2.3. Memory ..................................................................................................................................................... 43

2.2.3.1. Boot ROM ....................................................................................................................................... 43

2.2.3.2. SDRAM ........................................................................................................................................... 43

2.2.3.3. NAND Flash..................................................................................................................................... 43

2.2.3.4. SMHC .............................................................................................................................................. 44

2.2.4. System Peripherals .................................................................................................................................... 44

2.2.4.1. Timer .............................................................................................................................................. 44

2.2.4.2. High Speed Timer ........................................................................................................................... 44

2.2.4.3. GIC .................................................................................................................................................. 44

2.2.4.4. DMA ............................................................................................................................................... 44

2.2.4.5. CCU ................................................................................................................................................. 44

2.2.4.6. RTC ................................................................................................................................................. 45

2.2.4.7. PWM ............................................................................................................................................... 45

2.2.4.8. Thermal Sensor .............................................................................................................................. 45

2.2.4.9. Crypto Engine ................................................................................................................................. 45

2.2.4.10. Security ID .................................................................................................................................... 45

2.2.5. Video Engine ............................................................................................................................................. 45

2.2.5.1. Video Decoder ................................................................................................................................ 45

2.2.5.2. Video Encoder ................................................................................................................................ 46

2.2.6. Display Subsystem ..................................................................................................................................... 46

2.2.6.1. DE2.0 .............................................................................................................................................. 46

2.2.6.2. Video Output .................................................................................................................................. 46

2.2.7. Image Subsystem....................................................................................................................................... 46

2.2.8. Analog Subsystem ..................................................................................................................................... 47

2.2.8.1. Analog Codec ................................................................................................................................. 47

2.2.8.2. I2S/PCM .......................................................................................................................................... 47

2.2.8.3. OWA ............................................................................................................................................... 47

2.2.8.4. AC97 ............................................................................................................................................... 48

2.2.9. External Peripherals .................................................................................................................................. 48

2.2.9.1. USB ................................................................................................................................................. 48

2.2.9.2. EMAC .............................................................................................................................................. 48

2.2.9.3. GMAC ............................................................................................................................................. 48

Contents

2.2.9.4. Transport Stream Controller .......................................................................................................... 48

2.2.9.5. TWI ................................................................................................................................................. 48

2.2.9.6. Smart Card Reader ......................................................................................................................... 49

2.2.9.7. SPI ................................................................................................................................................... 49

2.2.9.8. UART ............................................................................................................................................... 49

2.2.9.9. PS2 .................................................................................................................................................. 49

2.2.9.10. CIR ................................................................................................................................................ 49

2.2.9.11. SATA ............................................................................................................................................. 50

2.2.9.12. Keypad .......................................................................................................................................... 50

2.2.9.13. KEYADC ......................................................................................................................................... 50

2.2.9.14. RTP ............................................................................................................................................... 50

2.2.10. Package ................................................................................................................................................... 50

2.3. Block Diagram ...................................................................................................................................................... 51

Chapter 3. System ............................................................................................................................................................... 53

3.1. Memory Mapping ................................................................................................................................................ 54

3.2. CPU Configuration ................................................................................................................................................ 57

3.2.1. Overview ................................................................................................................................................... 57

3.2.2. Register List ............................................................................................................................................... 57

3.2.3. Register Description .................................................................................................................................. 58

3.2.3.1. CPU0 Reset Control(Default Value: 0x0000_0003) ........................................................................ 58

3.2.3.2. CPU0 Control Register(Default Value: 0x0000_0000) .................................................................... 58

3.2.3.3. CPU0 Status Register(Default Value: 0x0000_0000) ...................................................................... 58

3.2.3.4. CPU1 Reset Control(Default Value: 0x0000_0001) ........................................................................ 59

3.2.3.5. CPU1 Control Register(Default Value: 0x0000_0000) .................................................................... 59

3.2.3.6. CPU1 Status Register(Default Value: 0x0000_0000) ...................................................................... 60

3.2.3.7. CPU2 Reset Control(Default Value: 0x0000_0001) ........................................................................ 60

3.2.3.8. CPU2 Control Register(Default Value: 0x0000_0000) .................................................................... 60

3.2.3.9. CPU2 Status Register(Default Value: 0x0000_0000) ...................................................................... 61

3.2.3.10. CPU3 Reset Control(Default Value: 0x0000_0001) ...................................................................... 61

3.2.3.11. CPU3 Control Register(Default Value: 0x0000_0000) .................................................................. 61

3.2.3.12. CPU3 Status Register(Default Value: 0x0000_0000) .................................................................... 62

3.2.3.13. CPUX Power Off Gating Register(Default Value: 0x0000_0000) ................................................... 62

3.2.3.14. CPU0 Power Switch Control Register(Default Value: 0x0000_0000) ............................................ 62

3.2.3.15. CPU1 Power Switch Control Register(Default Value: 0x0000_0000) ............................................ 62

3.2.3.16. CPUIDLE Enable Control Register(Default Value: 0x0000_0000) ................................................. 63

3.2.3.17. Close Core Flag Register(Default Value: 0x0000_0000) ............................................................... 63

3.2.3.18. IRQ_FIQ Status and Control Register(Default Value: 0x0000_0000) ............................................ 63

3.2.3.19. Power Switch Delay Register(Default Value: 0x0000_000A) ........................................................ 64

3.2.3.20. Configuration Delay Register(Default Value: 0x0000_0001) ........................................................ 64

3.2.3.21. Power Down Configuration Register(Default Value: 0x0000_00FF) ............................................. 64

3.2.3.22. Power Up Configuration Register0(Default Value: 0x0000_00FE)................................................ 64

3.2.3.23. Power Up Configuration Register1(Default Value: 0x0000_00FC) ............................................... 64

3.2.3.24. Power Up Configuration Register2(Default Value: 0x0000_00F8) ............................................... 65

3.2.3.25. Power Up Configuration Register3(Default Value: 0x0000_00F0) ............................................... 65

3.2.3.26. Power Up Configuration Register4(Default Value: 0x0000_00C0) ............................................... 65

3.2.3.27. Power Up Configuration Register5(Default Value: 0x0000_0000) ............................................... 65

3.2.3.28. General Control Register(Default Value: 0x1000_0020) .............................................................. 65

3.2.3.29. Event Input Register(Default Value: 0x0000_0000) ..................................................................... 66

3.2.3.30. 64-bit Counter Control Register(Default Value: 0x0000_0000) ................................................... 66

3.2.3.31. 64-bit Counter Low Register(Default Value: 0x0000_0000) ......................................................... 67

3.2.3.32. 64-bit Counter High Register(Default Value: 0x0000_0000) ........................................................ 67

3.3. CCU ....................................................................................................................................................................... 68

3.3.1. Overview ................................................................................................................................................... 68

3.3.2. Operations and Functional Descriptions ................................................................................................... 69

3.3.2.1. Block Diagram ................................................................................................................................ 69

3.3.2.2. Typical Applications........................................................................................................................ 73